What "Parallel Hz" Really Is

[Pooh Bear]

The PDP-8/I was fully-parallel, just like the PDP-8, except
that it was the first of the "-8" line to use TTL logic levels
(+3V & 0) instead of the negative ones (-3V & 0) used in the
Classic -8. [It was built out of "M-Series" modules, rather
than the "R/S/T/B-Series".]

Interesting stuff, indeed. I'm certainly not a DECie, so remembered
wrongly. ;-)

I thought TTL was +5V and 0. Or was this a later development?

The TI 74xx TTL series had a power supply of 5V and gnd (signal levels of
~3.6V and .8V), but that wasn't the only TTL ever to be done. IBM's
TTL, used in the 3080s, was +1.25/-3V with a signal level of gnd to -1.5V,
IIRC. TTL is a circuit topology, rather then a specific product.

BTW, most "TTL" wasn't. The later series ('S', 'AS', 'ALS', 'F', and even
'LS' were actually SDTL). My bet is that the DECs were DTL too, though
I'd love to hear more from Rob. ...maybe continue thos over on AFC.

Weren't the shottky ( and derived ) parts DTL input and TTL output ?

Graham

 

[Scott Alfter]

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Hash: SHA1

The image can be safely seen here, and is hardly worth the effort:

http://img56.imageshack.us/img56/2427/clocksignalexample8is.gif

Using the OPs link above crashed my browser. Naughty boy.
Shields up.

The OP is a troll. You should see the flamewar it ignited in comp.sys.apple2.

_/_
/ v \ Scott Alfter (remove the obvious to send mail)
(IIGS( http://alfter.us/ Top-posting!
\_^_/ rm -rf /bin/laden >What's the most annoying thing on Usenet?

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Version: GnuPG v1.4.2.2 (GNU/Linux)

iD8DBQFEZ8cAVgTKos01OwkRAsUWAKD0rmfKdZA9kw/dFRG5yIXYetcY8gCg5fEX
SFY2rsaENa+EENMXytK6WaQ=
=z7mv
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[Del Cecchi]

The PDP-8/I was fully-parallel, just like the PDP-8, except
that it was the first of the "-8" line to use TTL logic levels
(+3V & 0) instead of the negative ones (-3V & 0) used in the
Classic -8. [It was built out of "M-Series" modules, rather
than the "R/S/T/B-Series".]

Interesting stuff, indeed. I'm certainly not a DECie, so remembered
wrongly. ;-)

I thought TTL was +5V and 0. Or was this a later development?

The TI 74xx TTL series had a power supply of 5V and gnd (signal levels
of
~3.6V and .8V), but that wasn't the only TTL ever to be done. IBM's
TTL, used in the 3080s, was +1.25/-3V with a signal level of gnd
to -1.5V,
IIRC. TTL is a circuit topology, rather then a specific product.

BTW, most "TTL" wasn't. The later series ('S', 'AS', 'ALS', 'F', and
even
'LS' were actually SDTL). My bet is that the DECs were DTL too, though
I'd love to hear more from Rob. ...maybe continue thos over on AFC.

The 74s for sure was ttl not dtl. I'm not sure about 74LS.

 

[Keith]

Rob Warnock wrote:
The PDP-8/I was fully-parallel, just like the PDP-8, except
that it was the first of the "-8" line to use TTL logic levels
(+3V & 0) instead of the negative ones (-3V & 0) used in the
Classic -8. [It was built out of "M-Series" modules, rather
than the "R/S/T/B-Series".]

Interesting stuff, indeed. I'm certainly not a DECie, so remembered
wrongly. ;-)

I thought TTL was +5V and 0. Or was this a later development?

The TI 74xx TTL series had a power supply of 5V and gnd (signal levels of
~3.6V and .8V), but that wasn't the only TTL ever to be done. IBM's
TTL, used in the 3080s, was +1.25/-3V with a signal level of gnd to -1.5V,
IIRC. TTL is a circuit topology, rather then a specific product.

BTW, most "TTL" wasn't. The later series ('S', 'AS', 'ALS', 'F', and even
'LS' were actually SDTL). My bet is that the DECs were DTL too, though
I'd love to hear more from Rob. ...maybe continue thos over on AFC.

Weren't the shottky ( and derived ) parts DTL input and TTL output ?

Shottky diode logic (thus properly DTL) with a shottky clamped totem-pole
output (not part of "TTL"). IIRC, the origonal 74S series was still TTL
(multiple emitter inputs). It's been too long to remember where the
split was made though. ;-)

 

[Keith]

Rob Warnock wrote:
The PDP-8/I was fully-parallel, just like the PDP-8, except
that it was the first of the "-8" line to use TTL logic levels
(+3V & 0) instead of the negative ones (-3V & 0) used in the
Classic -8. [It was built out of "M-Series" modules, rather
than the "R/S/T/B-Series".]

Interesting stuff, indeed. I'm certainly not a DECie, so remembered
wrongly. ;-)

I thought TTL was +5V and 0. Or was this a later development?

The TI 74xx TTL series had a power supply of 5V and gnd (signal levels
of
~3.6V and .8V), but that wasn't the only TTL ever to be done. IBM's
TTL, used in the 3080s, was +1.25/-3V with a signal level of gnd
to -1.5V,
IIRC. TTL is a circuit topology, rather then a specific product.

BTW, most "TTL" wasn't. The later series ('S', 'AS', 'ALS', 'F', and
even
'LS' were actually SDTL). My bet is that the DECs were DTL too, though
I'd love to hear more from Rob. ...maybe continue thos over on AFC.

The 74s for sure was ttl not dtl. I'm not sure about 74LS.

Yes, I think you're correct. I think the split happened about the LS
timeframe. Even the 'LS family may be half TTL and half DTL.

 

[Rob Warnock]

+---------------
| Tarjei T. Jensen wrote:
| > Rob Warnock wrote:
| >> The PDP-8/I was fully-parallel, just like the PDP-8, except
| >> that it was the first of the "-8" line to use TTL logic levels
| >> (+3V & 0) instead of the negative ones (-3V & 0) used in the
| >> Classic -8. [It was built out of "M-Series" modules, rather
| >> than the "R/S/T/B-Series".]
....
| > I thought TTL was +5V and 0. Or was this a later development?
|
| The TI 74xx TTL series had a power supply of 5V and gnd (signal
| levels of ~3.6V and .8V)...
+---------------

Technically, yes. I was just rounding off for simplicity. And your
3.6V/0.8V aren't quite correct, either. The 3.6 was a "typical"
high output; the minimum guaranteed output voltage was less. IIRC,
the actual 74xx levels were these:

Power supply: +5.0 V +/- 0.25 V [4.75 - 5.25]
Maximum high output level: 5.0 V [actually, ~5.6 or so.]
"Typical" high output level: 3.6 V
Minimum high output level: 2.4 V
Maximum high input level: 2.0 V
"Typical" input threshold: ~1.5 V
Minimum low input level: 0.8 V
Maximum low output level: 0.4 V
Minimum low output level: 0.0 V [actually, ~-0.6 or so.]

As you can see, there's about 0.4 "noise margin" between what an
output driver must drive and what a receiver input must accept.
Also, when driven low, TTL inputs sourced substantial current
(typ. -1.6 mA per "unit load") which had to be sinked by the
outputs. [When driven high, inputs sinked a much smaller current,
~100 uA, IIRC, so a fairly-light static current source ("pullup
resistor") was needed on "open-collector" or "tri-state" busses.]

+---------------
| BTW, most "TTL" wasn't. The later series ('S', 'AS', 'ALS', 'F',
| and even 'LS' were actually SDTL). My bet is that the DECs were
| DTL too, though I'd love to hear more from Rob.
+---------------

Nope, the original M-Series boards were indeed classic 74xx TTL,
*very* low density, e.g., IIRC, an M206 card comprised only two
7474 chips -- only four flip-flops! Later cards may have used
some 'LS or 'S chips, and definitely added more MSI parts to the
earlier SSI-only mix.


-Rob

 

[Eric Smith]

I thought TTL was +5V and 0.

The power supply was +5V, but a TTL high signal was generally around
2.4V to 3V, unless you added a pullup. Minimum Vih was 2.0V.

 

[Del Cecchi]

+---------------
| Tarjei T. Jensen wrote:
| > Rob Warnock wrote:
| >> The PDP-8/I was fully-parallel, just like the PDP-8, except
| >> that it was the first of the "-8" line to use TTL logic levels
| >> (+3V & 0) instead of the negative ones (-3V & 0) used in the
| >> Classic -8. [It was built out of "M-Series" modules, rather
| >> than the "R/S/T/B-Series".]
....
| > I thought TTL was +5V and 0. Or was this a later development?
|
| The TI 74xx TTL series had a power supply of 5V and gnd (signal
| levels of ~3.6V and .8V)...
+---------------

Technically, yes. I was just rounding off for simplicity. And your
3.6V/0.8V aren't quite correct, either. The 3.6 was a "typical"
high output; the minimum guaranteed output voltage was less. IIRC,
the actual 74xx levels were these:

Power supply: +5.0 V +/- 0.25 V [4.75 - 5.25]
Maximum high output level: 5.0 V [actually, ~5.6 or so.]
"Typical" high output level: 3.6 V
Minimum high output level: 2.4 V
Maximum high input level: 2.0 V
"Typical" input threshold: ~1.5 V
Minimum low input level: 0.8 V
Maximum low output level: 0.4 V
Minimum low output level: 0.0 V [actually, ~-0.6 or so.]

As you can see, there's about 0.4 "noise margin" between what an
output driver must drive and what a receiver input must accept.
Also, when driven low, TTL inputs sourced substantial current
(typ. -1.6 mA per "unit load") which had to be sinked by the
outputs. [When driven high, inputs sinked a much smaller current,
~100 uA, IIRC, so a fairly-light static current source ("pullup
resistor") was needed on "open-collector" or "tri-state" busses.]

+---------------
| BTW, most "TTL" wasn't. The later series ('S', 'AS', 'ALS', 'F',
| and even 'LS' were actually SDTL). My bet is that the DECs were
| DTL too, though I'd love to hear more from Rob.
+---------------

Nope, the original M-Series boards were indeed classic 74xx TTL,
*very* low density, e.g., IIRC, an M206 card comprised only two
7474 chips -- only four flip-flops! Later cards may have used
some 'LS or 'S chips, and definitely added more MSI parts to the
earlier SSI-only mix.


-Rob

Thanks to "The TTL Data Book for Design Engineers, second edition" by TI
that happened to still be in my cabinet, it has been resolved. Regular
74xx, 74Hxx, were TTL. 74Sxx was mostly TTL but had some DTL in complex
functions. 74LS was DTL. Some devices also had PNP emitter follower
inputs on some pins.

 

[Keith]

+---------------
| Tarjei T. Jensen wrote:
| > Rob Warnock wrote:
| >> The PDP-8/I was fully-parallel, just like the PDP-8, except
| >> that it was the first of the "-8" line to use TTL logic levels
| >> (+3V & 0) instead of the negative ones (-3V & 0) used in the
| >> Classic -8. [It was built out of "M-Series" modules, rather
| >> than the "R/S/T/B-Series".]
...
| > I thought TTL was +5V and 0. Or was this a later development?
|
| The TI 74xx TTL series had a power supply of 5V and gnd (signal
| levels of ~3.6V and .8V)...
+---------------

Technically, yes. I was just rounding off for simplicity. And your
3.6V/0.8V aren't quite correct, either. The 3.6 was a "typical"
high output; the minimum guaranteed output voltage was less. IIRC,

As was I, thought pointing out that TTL covered a lot more than the
TI 74xx series.

Also, when driven low, TTL inputs sourced substantial current
(typ. -1.6 mA per "unit load") which had to be sinked by the
outputs. [When driven high, inputs sinked a much smaller current,
~100 uA, IIRC, so a fairly-light static current source ("pullup
resistor") was needed on "open-collector" or "tri-state" busses.]

Yes, the output of true TTL is an NPN emitter. In the low state
there is an emitter current out of the input (negative input
current). As you state, in the high state the emitter is reverese-
biased so there is only leakage current. The DTL variants were
similar, but with a shottky diode replacing the NPN emitter.

+---------------
| BTW, most "TTL" wasn't. The later series ('S', 'AS', 'ALS', 'F',
| and even 'LS' were actually SDTL). My bet is that the DECs were
| DTL too, though I'd love to hear more from Rob.
+---------------

Nope, the original M-Series boards were indeed classic 74xx TTL,
*very* low density, e.g., IIRC, an M206 card comprised only two
7474 chips -- only four flip-flops! Later cards may have used
some 'LS or 'S chips, and definitely added more MSI parts to the
earlier SSI-only mix.

Didn't know DEC used simple standard 74XX TTL that far back.
Thanks.

 

[GregS]

+---------------
| Tarjei T. Jensen wrote:
| > Rob Warnock wrote:
| >> The PDP-8/I was fully-parallel, just like the PDP-8, except
| >> that it was the first of the "-8" line to use TTL logic levels
| >> (+3V & 0) instead of the negative ones (-3V & 0) used in the
| >> Classic -8. [It was built out of "M-Series" modules, rather
| >> than the "R/S/T/B-Series".]
...
| > I thought TTL was +5V and 0. Or was this a later development?
|
| The TI 74xx TTL series had a power supply of 5V and gnd (signal
| levels of ~3.6V and .8V)...
+---------------

Technically, yes. I was just rounding off for simplicity. And your
3.6V/0.8V aren't quite correct, either. The 3.6 was a "typical"
high output; the minimum guaranteed output voltage was less. IIRC,

As was I, thought pointing out that TTL covered a lot more than the
TI 74xx series.

Also, when driven low, TTL inputs sourced substantial current
(typ. -1.6 mA per "unit load") which had to be sinked by the
outputs. [When driven high, inputs sinked a much smaller current,
~100 uA, IIRC, so a fairly-light static current source ("pullup
resistor") was needed on "open-collector" or "tri-state" busses.]

Yes, the output of true TTL is an NPN emitter. In the low state
there is an emitter current out of the input (negative input
current). As you state, in the high state the emitter is reverese-
biased so there is only leakage current. The DTL variants were
similar, but with a shottky diode replacing the NPN emitter.

+---------------
| BTW, most "TTL" wasn't. The later series ('S', 'AS', 'ALS', 'F',
| and even 'LS' were actually SDTL). My bet is that the DECs were
| DTL too, though I'd love to hear more from Rob.
+---------------

Nope, the original M-Series boards were indeed classic 74xx TTL,
*very* low density, e.g., IIRC, an M206 card comprised only two
7474 chips -- only four flip-flops! Later cards may have used
some 'LS or 'S chips, and definitely added more MSI parts to the
earlier SSI-only mix.

Didn't know DEC used simple standard 74XX TTL that far back.
Thanks.

Lets make sure to call those "Modules" not boards.

Certainly was present when I started working there in 69. The 8/I
integrated series, started ?? I was first trained on the PDP-15 in 1969.
I worked in an PDP- 8/I section, once a very tiny division, "displays and
data communication" !

greg

 

[Rich Grise]

Funny.
I once built a TV Typewriter, too.

Well, I _did_ put "TV Typewriter" in quotes - I used a 6845, controlled
by a Z80, and they shared the RAM - that was only interleaved clocks;
the pipelining was from the screen RAM to the character ROM to the
shift register.

For the keyboard, I had a raw keyboard - 64 keys with 64 ea. SPST switches,
so I scanned it with a 6502. Way cool chip, for small projects.

Cheers!
Rich

 

[Radium]

---
If you have to ask, then you don't know what you're talking about.

If you need some fundamental information it would probably be best
if you posted to sci.electronics.basics, where there are no stupid
questions.

Okay. But I still don't understand what causes leaking. What would
cause the circuits of my design to leak?

 

[Keith]

Okay. But I still don't understand what causes leaking. What would
cause the circuits of my design to leak?

Your design? Everything leaks, make more of 'em and they leak more.
You've added a billion more leakers. You can look at David Wang's
excellent "garden hose" analogy in this thread
comp.sys.ibm.pc.hardware.chips.

 

[Keith]

Okay. But I still don't understand what causes leaking. What would
cause the circuits of my design to leak?

Physics and arithemetic.

 

[Keith]

+---------------
| Tarjei T. Jensen wrote:
| > Rob Warnock wrote:
| >> The PDP-8/I was fully-parallel, just like the PDP-8, except
| >> that it was the first of the "-8" line to use TTL logic levels
| >> (+3V & 0) instead of the negative ones (-3V & 0) used in the
| >> Classic -8. [It was built out of "M-Series" modules, rather
| >> than the "R/S/T/B-Series".]
...
| > I thought TTL was +5V and 0. Or was this a later development?
|
| The TI 74xx TTL series had a power supply of 5V and gnd (signal
| levels of ~3.6V and .8V)...
+---------------

Technically, yes. I was just rounding off for simplicity. And your
3.6V/0.8V aren't quite correct, either. The 3.6 was a "typical"
high output; the minimum guaranteed output voltage was less. IIRC,

As was I, thought pointing out that TTL covered a lot more than the
TI 74xx series.

Also, when driven low, TTL inputs sourced substantial current
(typ. -1.6 mA per "unit load") which had to be sinked by the
outputs. [When driven high, inputs sinked a much smaller current,
~100 uA, IIRC, so a fairly-light static current source ("pullup
resistor") was needed on "open-collector" or "tri-state" busses.]

Yes, the output of true TTL is an NPN emitter. In the low state
there is an emitter current out of the input (negative input
current). As you state, in the high state the emitter is reverese-
biased so there is only leakage current. The DTL variants were
similar, but with a shottky diode replacing the NPN emitter.

+---------------
| BTW, most "TTL" wasn't. The later series ('S', 'AS', 'ALS', 'F',
| and even 'LS' were actually SDTL). My bet is that the DECs were
| DTL too, though I'd love to hear more from Rob.
+---------------

Nope, the original M-Series boards were indeed classic 74xx TTL,
*very* low density, e.g., IIRC, an M206 card comprised only two
7474 chips -- only four flip-flops! Later cards may have used
some 'LS or 'S chips, and definitely added more MSI parts to the
earlier SSI-only mix.

Didn't know DEC used simple standard 74XX TTL that far back.
Thanks.

Lets make sure to call those "Modules" not boards.

I don't see either word in the above. We always called the TTL widgets
"modules", and the things they were mounted to, "cards". Cards
then plugged into "boards", boards mounted to "gates", and gates into
"frames", until the 3080 when multiple logic chips were added to
the top level package (module).

Certainly was present when I started working there in 69. The 8/I
integrated series, started ?? I was first trained on the PDP-15 in 1969.
I worked in an PDP- 8/I section, once a very tiny division, "displays
and data communication" !

I'm not quite that old. I graduated in '74 and until then I only saw an
8/E (now I'm grasping at straws) in college. A few years later '76ish I
bought a Tektronix Signal Processing System with a PDP-11/35 (in dress
blues, rather than reds ;-). That was certainly chock-full of 74xx TTL
(and 56K of core <yikes>).

Come to think of it, the Unibus was 74xx sorts of levels.

 

[Radium]

Your design? Everything leaks, make more of 'em and they leak more.
You've added a billion more leakers. You can look at David Wang's
excellent "garden hose" analogy in this thread
comp.sys.ibm.pc.hardware.chips.

Please show me where there is a "David Wang" in this thread. There is a
"David Maynard" but I did see any "David Wang"

 

[krw]

Please show me where there is a "David Wang" in this thread. There is a
"David Maynard" but I did see any "David Wang"

Try googeling this thread in the newsgroup I indicated (CSIPHC).

 

[Rob Warnock]

+---------------
| Come to think of it, the Unibus was 74xx sorts of levels.
+---------------

Except that the required drive current was *very* high -- for drivers
you were supposed to use TI 7438 open-collector NANDs, which could
sink 48 mA -- and the required input leakage was *very* low -- for
bus receivers you were supposed to use National SP380 NORs [or when
those got hard to find, 8T380 NORs], which had PNP emitter-follower
inputs, and sourced only ~10 uA, IIRC.

These same drivers/receivers were required for the PDP-8/E Omnibus, too.


-Rob

p.s. Back at DCA [the comms company, not the agency], we once
had a terrible race condition in one of our Omnibus products,
because we had substituted 8T380s for SP380s. The former was dog
slow, ~70 ns, while the latter was *blazingly* fast [for the day],
somewhere in the 6-8 ns range! Turns out this exposed a "hold time"
issue elsewhere in the address decoder that had been covered up
by the 8T380's slow prop time. (Oops.)

 

[Rob Warnock]

+---------------
| Don Lancaster wrote:
| > Rich Grise wrote:
| >> I once built a "TV Typewriter" that used pipelining in the
| >> video data path.
| >>
| > Funny.
| > I once built a TV Typewriter, too.
|
| Well, I _did_ put "TV Typewriter" in quotes - I used a 6845...
+---------------

Uh... I suspect Don was referring to the *original* "TV Typewriter": ;-}

http://www.swtpc.com/mholley/RadioElectronics/TV_Typewriter.htm


-Rob

 

[Michael A. Terrell]

+---------------
| Don Lancaster wrote:
| > Rich Grise wrote:
| >> I once built a "TV Typewriter" that used pipelining in the
| >> video data path.
| >>
| > Funny.
| > I once built a TV Typewriter, too.
|
| Well, I _did_ put "TV Typewriter" in quotes - I used a 6845...
+---------------

Uh... I suspect Don was referring to the *original* "TV Typewriter": ;-}

http://www.swtpc.com/mholley/RadioElectronics/TV_Typewriter.htm

-Rob

If Rich built it, it was a "TV Trypewriter".


--
Service to my country? Been there, Done that, and I've got my DD214 to
prove it.
Member of DAV #85.

Michael A. Terrell
Central Florida