N
NV55
________________________________________________________________________________
The Morgan Stanley Semiconductor and Systems Conference was held
earlier today, and among the speakers was NVDIA's CEO, Jen-Hsun Huang
there to discuss NVIDIA's business and its prospects. Very early on in
the conference Jen-Hsun was asked if he'd like to talk about the NV4x
generation of parts to which, in a possible reference to the
performance of the NV3x generation, his quick response was "Nothing
would give me more pleasure to talk about NV4x", and so he did.
Jen-Hsun noted that that NV4x series was a new architectural
generation that has been designed to offer specific goals: give more
programmability, more performance, take advantage of the PCI-Express
platform, have higher yields and to be very scalable.
When looking at the performance element of NV4x, Jen-Hsun expects the
performance increment from the previous generation to be dramatically
higher than any previous architectural transition they have previously
been through. Indeed, presumably speaking about NV40 specifically,
NVIDIA's CEO states that "if we're not a lot more than 2 times faster
I'm going to be very disappointed". Upon discussing where such
performance increases could come from he made note that due to the
programmable nature of the graphics pipeline and that now applications
are making use of this, more and more elements cane be brought over
from the CPU world to enhance the instruction execution performance,
and its expected that NV4x will adopt a lot of these techniques.
In terms of scalability, as with previous generations, NV4x will span
a top to bottom line of graphics processors for the PC market space,
however there has been a greater emphasis in NV4x's design to
implement this goal. Its expected that by the end of the year there
will be an entire family of NV4x processors spanning the very high end
performance space, right down to the entry-level market; while this
strategy sounds similar to their previous generations what marks it as
different this time is the number of processors that may be available.
In the NV1x and NV2x generation more or less one two distinct
processors were introduced and produced at the same time, with the
NV3x architecture this increased to 3 processors, however Jen-Hsun
made note that potentially as many as 5 distinct NV4x graphics
processors may be in production at any one time.
The NV4x generation is also designed to be fully PCI-Express
compliant, and take full advantage of the benefits this bus
architecture brings. The indication here is that the parts produced on
the NV4x platform will be introduced with a native PCI-Express
interface – rumours suggest that NV40 will be AGP compliant, but
Jen-Hsun's comments raises the possibility that NV40 may be a
PCI-Express chip but the board may utilise their bridge chip to enable
it to operate in an AGP system. It was noted that their strategy of
not porting any of their current line over to PCI-Express does mean
they will need to utilise their bridge chip for the low end initially
as its they are not expecting to see the entry level NV4x part
available until the end of Quarter 3 '04.
Yields on the NV3x line of chips appears to have been a bugbear of
NVIDIA over the past year, and that is something they are hoping to
address with NV4x. Jen-Hsun spoke of "heavily patented technology"
utilised in the design of NV4x in order to bring the yields up, but
there was no expansion on just what this technology was. They noted
that due to the fast cycling nature of the market they are not able to
get the similar types of benefits as CPU vendors by refining a design
to bring costs down – it was noted that for these reasons and due to
the issues of yield which are not able to be resolved in the
timescales available for one platform NVIDIA actually has the largest
"scrap" (wasted die) of any semiconductor in the industry, which is
probably a good reason for their margin performance over the past
year. Jen-Hsun made note of his desire to see a "100% yield coming out
of TSMC" – while NVIDIA talked up IBM last year, its clear that TSMC
is rapidly becoming NVIDIA's primary foundry partner in a more vocal
sense, as the number of processors produced from IBM for NVIDIA are
still likely to be dwarfed by those that have continued to be produced
by TSMC.
Jen-Hsun commented that the rumours are suggesting the announcement of
NV4x in "a couple of short months" and that these are "likely to be
correct".
________________________________________________________________________________
Beyond3D discussion thread:
http://www.beyond3d.com/forum/viewtopic.php?p=231792
Nvidia conference audio:
http://customer.nvglb.com/MORG007/030104a_cf/linkdefault.asp?entity=nvidia
The Morgan Stanley Semiconductor and Systems Conference was held
earlier today, and among the speakers was NVDIA's CEO, Jen-Hsun Huang
there to discuss NVIDIA's business and its prospects. Very early on in
the conference Jen-Hsun was asked if he'd like to talk about the NV4x
generation of parts to which, in a possible reference to the
performance of the NV3x generation, his quick response was "Nothing
would give me more pleasure to talk about NV4x", and so he did.
Jen-Hsun noted that that NV4x series was a new architectural
generation that has been designed to offer specific goals: give more
programmability, more performance, take advantage of the PCI-Express
platform, have higher yields and to be very scalable.
When looking at the performance element of NV4x, Jen-Hsun expects the
performance increment from the previous generation to be dramatically
higher than any previous architectural transition they have previously
been through. Indeed, presumably speaking about NV40 specifically,
NVIDIA's CEO states that "if we're not a lot more than 2 times faster
I'm going to be very disappointed". Upon discussing where such
performance increases could come from he made note that due to the
programmable nature of the graphics pipeline and that now applications
are making use of this, more and more elements cane be brought over
from the CPU world to enhance the instruction execution performance,
and its expected that NV4x will adopt a lot of these techniques.
In terms of scalability, as with previous generations, NV4x will span
a top to bottom line of graphics processors for the PC market space,
however there has been a greater emphasis in NV4x's design to
implement this goal. Its expected that by the end of the year there
will be an entire family of NV4x processors spanning the very high end
performance space, right down to the entry-level market; while this
strategy sounds similar to their previous generations what marks it as
different this time is the number of processors that may be available.
In the NV1x and NV2x generation more or less one two distinct
processors were introduced and produced at the same time, with the
NV3x architecture this increased to 3 processors, however Jen-Hsun
made note that potentially as many as 5 distinct NV4x graphics
processors may be in production at any one time.
The NV4x generation is also designed to be fully PCI-Express
compliant, and take full advantage of the benefits this bus
architecture brings. The indication here is that the parts produced on
the NV4x platform will be introduced with a native PCI-Express
interface – rumours suggest that NV40 will be AGP compliant, but
Jen-Hsun's comments raises the possibility that NV40 may be a
PCI-Express chip but the board may utilise their bridge chip to enable
it to operate in an AGP system. It was noted that their strategy of
not porting any of their current line over to PCI-Express does mean
they will need to utilise their bridge chip for the low end initially
as its they are not expecting to see the entry level NV4x part
available until the end of Quarter 3 '04.
Yields on the NV3x line of chips appears to have been a bugbear of
NVIDIA over the past year, and that is something they are hoping to
address with NV4x. Jen-Hsun spoke of "heavily patented technology"
utilised in the design of NV4x in order to bring the yields up, but
there was no expansion on just what this technology was. They noted
that due to the fast cycling nature of the market they are not able to
get the similar types of benefits as CPU vendors by refining a design
to bring costs down – it was noted that for these reasons and due to
the issues of yield which are not able to be resolved in the
timescales available for one platform NVIDIA actually has the largest
"scrap" (wasted die) of any semiconductor in the industry, which is
probably a good reason for their margin performance over the past
year. Jen-Hsun made note of his desire to see a "100% yield coming out
of TSMC" – while NVIDIA talked up IBM last year, its clear that TSMC
is rapidly becoming NVIDIA's primary foundry partner in a more vocal
sense, as the number of processors produced from IBM for NVIDIA are
still likely to be dwarfed by those that have continued to be produced
by TSMC.
Jen-Hsun commented that the rumours are suggesting the announcement of
NV4x in "a couple of short months" and that these are "likely to be
correct".
________________________________________________________________________________
Beyond3D discussion thread:
http://www.beyond3d.com/forum/viewtopic.php?p=231792
Nvidia conference audio:
http://customer.nvglb.com/MORG007/030104a_cf/linkdefault.asp?entity=nvidia