PIO mode

[toylet]

Does the hardware involved check for errors during data transfer?

 

[Andrew Rossmann]

Does the hardware involved check for errors during data transfer?

A CRC is computed for each packet of data. If it doesn't match, an error
is flagged and passed to the software. I believe it's up to the
software/drive firmware to figure out what to do next (usually retry a few
times.) I believe UDMA33 and higher have more aggressive error correction
and retries.

 

[Eric Gisin]

A CRC is computed for each packet of data. If it doesn't match, an error
is flagged and passed to the software. I believe it's up to the
software/drive firmware to figure out what to do next (usually retry a few
times.) I believe UDMA33 and higher have more aggressive error correction
and retries.

All UDMA modes have CRC, and PIO/DMA have none.

 

[Andrew Rossmann]

All UDMA modes have CRC, and PIO/DMA have none.

I guess it depends on what level everyone is talking about. There has
always been a CRC stored on the drive and it's checked when it reads the
data. If there are too many retry failures, it passes a failure code to
the controller. Back in the MFM/RLL/ESDI days, that was done on a card
separate from the drive, so you did sort-of check the integrity of the
signal in the cabling. With IDE, it's all built-into the drive, so before
UDMA33, it was assumed the data traveling on the cable always made it
through with no error. It's also why the 80-wire cable was required for
UDMA66 to give better shielding.

 

[Arno Wagner]

Does the hardware involved check for errors during data transfer?

Neither for transfer nor for commands. PIO is completely unprotected
on the bus.

Arno

 

[Folkert Rienstra]

I guess it depends on what level everyone is talking about.

Simple: "Does the hardware involved check for errors during *data transfer*?"

There has always been a CRC stored on the drive
Nope.

and it's checked when it reads the data.

That's an ECC.