You seem to be talking about using a part under conditions
that exccede it's rated specifications.
That's what any motherboard does, since your typical caps
are rated for around 3000 hours which is only a few months.
Since they run cooling than the contextual specs we can try
to project the resultant lifespan increase but the margin of
error becomes far too large to rely on.
An accepted design
practice:
"For an approximation, start by making sure the RMS current
rating of the capacitor is at least 75% of the max load current
(50% if the ambient will not exceed 40 degC). This is only to
help in sizing, this will often give a minimum value if cross
referenced with the required voltage rating. Then assume at an
instantaneous load increase that the capacitor will initially supply
all the current. You will have to estimate the response time of
the source to supply the input current needed, that is the time
when the voltage will stop dipping. Then just use i=Cdv/dt to
size the cap for a certain voltage drop."
It's fairly pointless to idealize cap selection then assume
this is what actually applies on motherboard design. In the
vast majority of cases, cost and board real-estate is what
applies.
Further, I don't see any suggestion that you have actually
determined the particular caps' RMS current rating IS at
least 75% of the max load current. I'm not suggesting it
isn't, but someone's recommendation is proof more than there
are people that AREN'T doing this, than anything else.
Sure, ESR and dissipation factor, both quite applicable to
your situation with the passively cooled system.
Hot or not, if used within design requirements that take the
parts rated performance factors into account, only defective
parts can thermally damage themselfs.
You are misunderstanding. Caps do wear out, it's not
necessarily classified as "damage" for the cap to wear out,
it's expected. Specs show lifetimes only months long, low
single-digit thousands of hours.
The way a board manages to run for years instead is that the
board manufacturer fudges, they're anticipating worst case
with stock speed, and temps, and still guessing since they
can't use the same caps available 10+ years ago to use any
accumlated data... if they had accumulated any in the first
place rather than a more direct, boards-fail-caps-bad RMA
dept. observation.
Now if you are saying
that some manufactures might use less than the best engineering
design practices, I won't argue that point. I buy MB that I
believe to be well engineered, primarily "Asus".
They're better than average, even one of my favored brands,
but they are not choosing components and design for a target
use of a passive(ly cooled) system.
<35c, as I just measured. A definition of "normal thermal
specs", as in my statement "well within the normal thermal
specs" would not indicate operation "near their max specs",
but somewhere near the middle of the range.
You are not measuring appropriately. Again, there is no
chance your FET dies are under 50C at load. Measuring the
base of a questionably (even good, for that matter) bonded
heatsink on the top of a FET epoxy case is just not going to
generate useful data.
Total BS, there is a thermal gradient that is factored into the
design and selection of the heatsink, but it is nowhere near 50c.
Actually that's pretty much nonsense, you're idealizing
instead of looking at what they've done. Asus' design is
not particularly unique, then they put on a heatsink that
merely fits in the space available. It may help some, or
it might even cause *harm* in some situations because it is
not cooling by an efficient thermal path through epoxy, but
it is blocking airflow (even passive radiation) away from
the copper on the board to some significant extent.
You want to cite engineering standards then ignore it is
completely invalid to guess that this heatsink was
implemented by some standard and then guess based on the
heatsink temp, that you know the FET die itself is under
50C.
Didn't you realize it may be over 50C even if the epoxy
itself were 35C? You now measure across even more material,
with an interface known to be a variable (multiple fet
placement and solder bath techniques are not good enough to
ensure multiple parts epoxy casings are on an exact parallel
plane, let alone the epoxy machined flat on top, let along
an effective transfer material between 'sink and Fet.
If you want most effective heat transfer from FET to a
'sink, you need to chop the heatsink into pieces, lap the
top of the Fet epoxy casing, epoxy the heatsink onto it, and
even then, you still can't measure a 35C heatsink and assume
the die is below 50C.
The real question isn't whether it's below 50C though, it's
what temp they are actually running at, except the primary
problem is still most likely the capacitors.
Would that be the same copper that has a large number of
connections to the near by water cooled CPU?
No, not to a significant enough extent. You can't extend a
thin copper heatsink indefinitely and have any useful
benefit, it would need be thicker immediately under the FET.
On a board designed to be passive, it would be a physically
larger board, and likely the FETs back to old TO220 style
with a perpendicular heatsink. That is unless a
substantially lower current CPU were used/allowed.
I very much doubt that they would be operating above 50%
of their thermal rating even under "full load".
That would be an arbitrary thing to doubt, not even
considering that boads are not designed for idealized specs
targeted to passive cooling, rather to what they can get
away with at high density, small boards, lower cost, and
actively cooled chassis use.
The question was in regard to the "danger" to these chips in
a fanless environment. The temp. readings off the heatsink
are not elevated enough above the MB die temp (32c) or the
CPU die temp (30c) to indicate impending doom.
False, you have not indicated to an even remotely reasonable
extent that you can estimate the FET die from what reading
you have taken. You can cite a theory about what someone
might be able to do with an idealized design and
manufacturing, but that doesn't transcend actual meaurements
and actual data from FET and board manufacturer to resolve
the expected FET die temp.
Frankly it would be easier to just ask Asus if their board
warranty is valid with zero fans in a system. At least
then, if they would warranty it and you can hold them to
their word, you would have resolution if it had failed in
that period of time.
In fact air
coming off the CPU heatsink, in an air cooled system, would
be at a much higher temp. and would possibly raise the
heatsink's temp. (Which might not impact the amount of heat
it could extract.)
False. Airflow removes heat at a faster rate, any local
areas will be cooler.
You act as though you're the first person to have tried
passive cooling. I wasn't just theorizing about elevated
temps, I ALWAYS set up a system on a bench and check temps
before building with it. That means no case airflow of
course, and with modern systems having CPU fan control it
also means setting that to see what the CPU temp will be
without a fan, as well as a passive chipset, PSU that is not
as it is in a case right above the board, and even then far
better convection without any chassis.
Your system is running hotter than you realize, it's almost
strange that you can't accept that parts that create heat
will be significantly hotter if their heatsinking isn't as
effective which it obviously can't be without the airflow
intended by the designer.
