Intel held an analyst day today

[Yousuf Khan]

Intel held its annual analyst day today. Lots of news coverage about it.
Everybody is asking what's going wrong with Intel and what Intel
intends to do about it.

This article says that Intel will from now on start introducing new
microarchitectures every two years instead of every 4-6 years:

Intel steps up chip cadence | CNET News.com
http://news.com.com/Intel+steps+up+chip+cadence/2100-1006_3-6065925.html

Also Intel has announced that it will start restructuring its business.
With possible job cuts and pairing of underperforming business groups:

"Otellini: Intel plans broad restructuring"
http://wireservice.wired.com/wired/story.asp?section=Business&storyId=1517387

It's also announced a bunch of new platforms in the last little while,
such as Viiv from a few months ago, and now a business desktop platform
called Vpro:

Intel's vPro technology gets smarter with security - TechSpot News
http://www.techspot.com/news/21452-Intels-vPro-technology-gets-smarter-with-security.html

 

[Keith]

Intel held its annual analyst day today. Lots of news coverage about it.
Everybody is asking what's going wrong with Intel and what Intel
intends to do about it.

This article says that Intel will from now on start introducing new
microarchitectures every two years instead of every 4-6 years:

Neat. Define "microarchetecture". ...and does this mean they're going
to make mistakes even faster?

Intel steps up chip cadence | CNET News.com
http://news.com.com/Intel+steps+up+chip+cadence/2100-1006_3-6065925.html

Also Intel has announced that it will start restructuring its business.
With possible job cuts and pairing of underperforming business groups:

i.e. the death spiral.

"Otellini: Intel plans broad restructuring"

i.e. golden parachutes in advance of the death spiral.

http://wireservice.wired.com/wired/story.asp?section=Business&storyId=1517387

It's also announced a bunch of new platforms in the last little while,
such as Viiv from a few months ago, and now a business desktop platform
called Vpro:

Cool! More alphabet soup to cover the golden parachutes, covering the
death spiral.

Intel's vPro technology gets smarter with security - TechSpot News
http://www.techspot.com/news/21452-Intels-vPro-technology-gets-smarter-with-security.html

Have they given a thought about *innovating*? Nah, too risky; no golden
parachute.

 

[Judd]

Neat. Define "microarchetecture". ...and does this mean they're going
to make mistakes even faster?


i.e. the death spiral.


i.e. golden parachutes in advance of the death spiral.


Cool! More alphabet soup to cover the golden parachutes, covering the
death spiral.
http://www.techspot.com/news/21452-Intels-vPro-technology-gets-smarter-with-security.html

Have they given a thought about *innovating*? Nah, too risky; no golden
parachute.

Love the post Keith! I don't get the strategy of laying people off and
cutting their spending just to please the shareholders. The company has
gone years without having to make such moves despite the downfalls of
others. Can't they wait another couple of quarters before making such a
move? With 3 new platforms set to deliver this summer, you would think they
would see what happens with that. Would they seriously cut R&D at this
time? How will they come out with new products twice as fast while cutting
workers? I can see the Golden Parachute's now.

 

[Yousuf Khan]

Neat. Define "microarchetecture". ...and does this mean they're going
to make mistakes even faster?

Exactly, Paul Otellini, the former marketing manager, has directed that
the engineers shall come up with a new microarchitecture every two
years, and thus it shall be; never that adding bodies has diminishing
returns. If that doesn't sound like a pointy-haired boss scenario, then
I don't know what does.

i.e. the death spiral.

Carly Fiorina is rolling in her grave that somebody would copy from her
playbook, so soon. Oh wait, she's still alive.

Anyways the playbook goes something like this:

1) Bring in superstar CEO. Any CEO would do, just as long as they are a
superstar, experience in the business not necessary. (e.g. Greg Maffei,
formerly CFO of Microsoft became CEO of fiber-optics firm Worldwide
Fibers, and then ran it into the ground.)
2) CEO reorgs business over and over again, just to look busy and make
it look like they know what they're doing. Perhaps CEO comes up with new
catchy phrases and product names too. (e.g. Greg Maffei's only
accomplishment was renaming Worldwide Fibers to 360 Networks.)
3) Either the business has bought the farm by this point, or the board
of directors steps in and fires the CEO.

Have they given a thought about *innovating*? Nah, too risky; no golden
parachute.

But they're going to introduce a new microarchitecture every two years!
Isn't that innovation enough? ;-)

Yousuf Khan

 

[chrisv]

Love the post Keith! I don't get the strategy of laying people off and
cutting their spending just to please the shareholders. The company has
gone years without having to make such moves despite the downfalls of
others. Can't they wait another couple of quarters before making such a
move?

Obviously, you do not understand how the evil businessman thinks.
I'ts all about THIS QUARTER, MAN. Matters not who or what is hurt, if
it means more money in MY pocket. All I need as a stock-price peak so
that I can cash in my options!

 

[bbbl67]

Love the post Keith! I don't get the strategy of laying people off and
cutting their spending just to please the shareholders. The company has
gone years without having to make such moves despite the downfalls of
others. Can't they wait another couple of quarters before making such a
move? With 3 new platforms set to deliver this summer, you would think they
would see what happens with that. Would they seriously cut R&D at this
time? How will they come out with new products twice as fast while cutting
workers? I can see the Golden Parachute's now.

Well, depends on from where they are going to lay the people off. If
they lay the Itanium people off, it's no big deal. Now there's an
"underperforming business unit", if I've ever seen an underperforming
business unit. If they're serious about restructuring, then there's no
doubt that Itanium must go.

Secondly, about this nutty idea that Otellini came up with about coming
up with a new microarchitecture every two years. Only a marketing
manager could come up with this non-sense. New microarchitectures come
out when they need to come out. Otellini obviously wants a new
architecture for the sake of marketing. It's the usual, "new &
improved" bullcrap. It's no different than Gillette going from 2
blades, to 3 blades, to 5. Otellini is way out of his league here if he
thinks architectures can be brought out in time for new marketing
campaigns.

Yousuf Khan

 

[chrisv]

Well, depends on from where they are going to lay the people off. If
they lay the Itanium people off, it's no big deal. Now there's an
"underperforming business unit", if I've ever seen an underperforming
business unit. If they're serious about restructuring, then there's no
doubt that Itanium must go.

I don't know about that... I would not be surprised to learn that the
Itanium business is quite profitable, at this point in time.
Obviously, there's not much hope recovering the $billions spent in
developing this turkey, but shutting Itanium down won't recover it
either.

 

[Keith Williams]

I don't know about that... I would not be surprised to learn that the
Itanium business is quite profitable, at this point in time.
Obviously, there's not much hope recovering the $billions spent in
developing this turkey, but shutting Itanium down won't recover it
either.

There's a reason it's called "sunk cost".

 

[Yousuf Khan]

I don't know about that... I would not be surprised to learn that the
Itanium business is quite profitable, at this point in time.
Obviously, there's not much hope recovering the $billions spent in
developing this turkey, but shutting Itanium down won't recover it
either.

Well, as it's been surmised here, a company doesn't lay people off
because of a short-term marketshare loss. They lay people off because
they expect to be a smaller company in the future. At present, Intel is
just burning through their cash horde. Just a couple years ago they had
$14B in the bank, this quarter it's dwindled to just $7B. During this
time, Intel went from 80,000 employees to 100,000 employees, and it kept
building new fabs.

If they don't get rid of the Itanium business, then what are they going
to get rid of? They have a NOR flash business, which is no longer any
fun for them, because AMD is no longer in that business (since it spun
off Spansion). They can possibly get rid of NOR first. But eventually,
Itanium is going to need to go for the chopping block too:

Itanium’s support is ebbing away - WhatPC?
http://www.whatpc.co.uk/itweek/comment/2155045/itanium-support-ebbing-away

Yousuf Khan

 

[nobody]

Secondly, about this nutty idea that Otellini came up with about coming
up with a new microarchitecture every two years. Only a marketing
manager could come up with this non-sense. New microarchitectures come
out when they need to come out. Otellini obviously wants a new
architecture for the sake of marketing. It's the usual, "new &
improved" bullcrap. It's no different than Gillette going from 2
blades, to 3 blades, to 5. Otellini is way out of his league here if he
thinks architectures can be brought out in time for new marketing
campaigns.

Yousuf Khan

That depends on the spin they put on it. It was sufficient to
repackage PPro in slot 1 cartridge to call it PII - new
microarchitecture, isn't it? Adding SSE was enough to call it P!!! -
another new microarchitecture. Tweaking it for lower power
consumption (admittedly the tweaks were really good) and changing the
FSB to that of P4 brought to you another new microarchitecture - PM.
Fast forward to 2006, a few more tweaks and SSE instructions - welcome
to the Core Solo. Glue 2 of these together - here comes Core Duo.
With exception of ill-fated Netbust, Intel keeps milking the old good
P6. Yet judging by the brands/trademarks/codenames(add here all the
Xeons and Celerons), Intel comes up with brand new microarchitecture
every now and then. At least that's how both 6-pack Joe and the
anal...yists see it. And all this happened when the corner office was
inhabited by engineers (at least by training). Now that it's occupied
by a marketeer, there will be enough differences found between the
iterations of the same chip to call it "new, improved
microarchitecture".

NNN

 

[Ed]

Intel held its annual analyst day today. Lots of news coverage about it.
Everybody is asking what's going wrong with Intel and what Intel
intends to do about it.

They intend to sabotage some Opterons so AMD gets some bad press.
http://www.amd.com/us-en/0,,3715_13965,00.html?redir=CORPR01

Ed

 

[Keith]

That depends on the spin they put on it. It was sufficient to
repackage PPro in slot 1 cartridge to call it PII - new
microarchitecture, isn't it?

No. Even though the PII was quite a bit more than a "repackage PPro in
slot 1 cartridge", it was still a P6 microarchitecture.

Adding SSE was enough to call it P!!! - another new microarchitecture.

Nope, still P6.

Tweaking it for lower power consumption
(admittedly the tweaks were really good) and changing the FSB to that of
P4 brought to you another new microarchitecture - PM.

Nope, still P6.

Fast forward to
2006, a few more tweaks and SSE instructions - welcome to the Core Solo.
Glue 2 of these together - here comes Core Duo. With exception of
ill-fated Netbust, Intel keeps milking the old good P6.

True, but still variations on the P6 microarchitecture (as you point out
above).

Yet judging by
the brands/trademarks/codenames(add here all the Xeons and Celerons),
Intel comes up with brand new microarchitecture every now and then. At
least that's how both 6-pack Joe and the anal...yists see it. And all
this happened when the corner office was inhabited by engineers (at
least by training). Now that it's occupied by a marketeer, there will
be enough differences found between the iterations of the same chip to
call it "new, improved microarchitecture".

No, these are all the same microarchitecture. The P4 was a different
microarchitecture and we all know how that idea turned out. ;-)

 

[nobody]

No. Even though the PII was quite a bit more than a "repackage PPro in
slot 1 cartridge", it was still a P6 microarchitecture.


Nope, still P6.


Nope, still P6.


True, but still variations on the P6 microarchitecture (as you point out
above).


No, these are all the same microarchitecture. The P4 was a different
microarchitecture and we all know how that idea turned out. ;-)

If it is found helpful for marketing purpose, even different speed
grades of the same thing may be declared "new, massively improved"
architecture. After all, the multiplier is different, and if Mr.
Otellini decides that the multiplier is what defines the
microarchitecture, it will be so. Most of the anal...ysts will take
it gladly up their ...

NNN

 

[George Macdonald]

There's a reason it's called "sunk cost".

Ooooohh - tsk, tsk Keith - that's a err, deep [oops, there I go too] cut:
"sunk" umm, Itanic!;-)

 

[George Macdonald]

Exactly, Paul Otellini, the former marketing manager, has directed that
the engineers shall come up with a new microarchitecture every two
years, and thus it shall be; never that adding bodies has diminishing
returns. If that doesn't sound like a pointy-haired boss scenario, then
I don't know what does.

Don't forget the recent manouver which scattered engineers out to
"solutions" units and mixed in newly hired "social scientists" to stir the
brew. I tend to think Sculley:Apple == Otellini:Intel... no?

 

[George Macdonald]

They intend to sabotage some Opterons so AMD gets some bad press.
http://www.amd.com/us-en/0,,3715_13965,00.html?redir=CORPR01

Hmm, so what does "test escape" mean exactly and "inconsistent results"
could mean anything from underclocking to an "FPU Bug". Anybody know? Now
all the OC groups are going to be trying to demonstrate the "inconsistency"
with all the FX chips out there. How long before the "rigorous software
verification tool" gets into the wild?

 

[Douglas Bollinger]

Hmm, so what does "test escape" mean exactly and "inconsistent results"
could mean anything from underclocking to an "FPU Bug". Anybody know? Now
all the OC groups are going to be trying to demonstrate the "inconsistency"
with all the FX chips out there. How long before the "rigorous software
verification tool" gets into the wild?

Think accidental factory O/C CPUs. They were binned higher than they
should have been.

 

[Keith]

There's a reason it's called "sunk cost".

Ooooohh - tsk, tsk Keith - that's a err, deep [oops, there I go too] cut:
"sunk" umm, Itanic!;-)

Precisely! ...and to think the business droids thought up the term
perhaps a century ago (perhaps when we were in college . Is that
foreshadowing, or what?! ;-)

 

[Keith]

Hmm, so what does "test escape" mean exactly

Ohhh, Ohhh, I know the answer to that one! Translation: "our hardware
verification engineers F***ED up!" It's kinda like one of our parts ( a
couple of decades ago, so...) that came back from the field with some
nasty notes about SPQL. ...turns out there was *nothing* inside the
package. A "productivity improvement" put into the test program would pass
an open-socket. Such screwups demand a shan and a pile of matching fit.
From then on, even our incomming inspection programs had to be proven
to fail "open socket" before release to manufacturing.

and "inconsistent results"
could mean anything from underclocking to an "FPU Bug". Anybody know? Now
all the OC groups are going to be trying to demonstrate the "inconsistency"
with all the FX chips out there. How long before the "rigorous software
verification tool" gets into the wild?

Talk to RobertR. He's likely already on the mission and burned the tape. ;-)

 

[Johnno]

Ohhh, Ohhh, I know the answer to that one! Translation: "our
hardware verification engineers F***ED up!" It's kinda like one of
our parts ( a couple of decades ago, so...) that came back from the
field with some nasty notes about SPQL. ...turns out there was
*nothing* inside the package. A "productivity improvement" put into
the test program would pass an open-socket. Such screwups demand a
shan and a pile of matching fit. From then on, even our incomming
inspection programs had to be proven to fail "open socket" before
release to manufacturing.

I've had packages back with no chips in them before, but that normally
meant we 'forgot' to test them. I've never managed to write a test
program that passed an empty socket, but I guess there's still time.
'Test escape' normally means you tested it incorrectly, not that your
program doesn't find the fault. So either you used the wrong program, or
bins got mixed up, or it wasn't tested at all.

Test holes, on the other hand, are where you missed some coverage which
the customer didn't. It happens occasionally, and usually equates to a
tiny dpm. So you just add in a test for it, if you can and it's not too
expensive, and move on.