How is it bloated, oh font of interconnect wisdom? Perhaps you don't
realize it, but serial interconnects are far higher bandwidth...
I don't see how that is "using PCI-e against Intel"...
No it's not cancelled moron. Deerfield is a LV IPF part. They
cancelled Whitefield. White, not deer.
Intel's next gen server chipset is a wonderful piece of work and
features dual independent FSBs.
'Cept they're a trifle late to the party - IBM's already done it.
I suspect the next generation after
that will feature 4 or more.
If you'd been paying attention, it'd be clear that the "next generation"
will be no more FSB - it won't exist, it'll be kaput, it'll be an err,
ex-FSB. The only reason that Intel is not going to an intergrated memory
controller sooner is because of the mess of market segmentation they've
attempted to create - IOW the marketing tail has been wagging the technical
dog for far too long.
In fact *I* suspect that the just cancelled chip was to be the last FSB CPU
- IOW the road-map adjustment which brings a later development forward to
replace it is the first integrated memory controller CPU. Untangling
marketing bungles, rearranging road-maps which are falling apart under
competitive pressures, does take some time and umm, energy.