G
Guest
Hi,
I'm having an issue with my old ABIT VP6 board. It's a dual processor board
that has a very defunct BIOS, in the sense that it provides flawed IRQ
routing information either through the ACPI tables when set to use APIC mode,
or via the MPS table when using version 1.4.
The routing information is correct when using the ACPI tables in PIC mode,
or when relying on MPS at version 1.1. I've tested it in Linux, by comparing
which devices use which interrupts.
I should also note that I did play with the HAL settings -- I've used the
MPS HAL for a while, but had some stability issues, and the CPU seemd to be
running hot all the time (as if the HLT instruction wasn't executed); I am
now using the ACPI Uniprocessor HAL, which doesn't use APIC mode, and the
system is stable, but I lost the use of one of my CPUs. Needless to say, the
multiprocessor ACPI HAL is unstable, since the IRQ information is flawed.
So, my question is this: is there a way to disable the use of IRQ routing
information from the ACPI system? Windows 98 comes to mind with its IRQ
steering options; the other option would be to completely disable the IOAPIC,
which will force the system to PIC mode, thus the information in the ACPI
tables would be fine. The former option would be preferable, and that is what
I do in Linux -- I instruct the kernel not to use the ACPI routing
information, while setting the MPS version to 1.1; this way the IOAPIC is
still used, and both CPUs can handle interrupts. If I disable the IOAPIC
completely, then only the first CPU can handle interrupts.
Any help will be greatly appreciated.
I'm having an issue with my old ABIT VP6 board. It's a dual processor board
that has a very defunct BIOS, in the sense that it provides flawed IRQ
routing information either through the ACPI tables when set to use APIC mode,
or via the MPS table when using version 1.4.
The routing information is correct when using the ACPI tables in PIC mode,
or when relying on MPS at version 1.1. I've tested it in Linux, by comparing
which devices use which interrupts.
I should also note that I did play with the HAL settings -- I've used the
MPS HAL for a while, but had some stability issues, and the CPU seemd to be
running hot all the time (as if the HLT instruction wasn't executed); I am
now using the ACPI Uniprocessor HAL, which doesn't use APIC mode, and the
system is stable, but I lost the use of one of my CPUs. Needless to say, the
multiprocessor ACPI HAL is unstable, since the IRQ information is flawed.
So, my question is this: is there a way to disable the use of IRQ routing
information from the ACPI system? Windows 98 comes to mind with its IRQ
steering options; the other option would be to completely disable the IOAPIC,
which will force the system to PIC mode, thus the information in the ACPI
tables would be fine. The former option would be preferable, and that is what
I do in Linux -- I instruct the kernel not to use the ACPI routing
information, while setting the MPS version to 1.1; this way the IOAPIC is
still used, and both CPUs can handle interrupts. If I disable the IOAPIC
completely, then only the first CPU can handle interrupts.
Any help will be greatly appreciated.