45 nm technology

[Yousuf Khan]

"FinFETs won't be used. High-k and metal gates won't be used. Companies
will not necessarily be using silicon-on-insulator (SOI) substrates. But
the one technology that will be indispensable at the 45 nm node is
strain engineering — and lots of it. "

Semiconductor International - Options Narrow at 45 nm - 1/1/2006 -
Semiconductor International - CA6294195
http://www.reed-electronics.com/semiconductor/article/CA6294195?pubdate=1/1/2006

Yousuf Khan

 

[David Wang]

"FinFETs won't be used. High-k and metal gates won't be used. Companies
will not necessarily be using silicon-on-insulator (SOI) substrates. But
the one technology that will be indispensable at the 45 nm node is
strain engineering ??? and lots of it. "

Semiconductor International - Options Narrow at 45 nm - 1/1/2006 -
Semiconductor International - CA6294195
http://www.reed-electronics.com/semiconductor/article/CA6294195?pubdate=1/1/2006

Intel *may* be able pull high-k + metal (FUSI) in to the 45 nm node.

http://www.realworldtech.com/page.cfm?ArticleID=RWT123005001504

 

[Yousuf Khan]

Intel *may* be able pull high-k + metal (FUSI) in to the 45 nm node.

http://www.realworldtech.com/page.cfm?ArticleID=RWT123005001504

So when were high-k and metal first introduced?

Yousuf Khan

 

[David Wang]

So when were high-k and metal first introduced?

?

Not sure what you're asking. They've never been "introduced" into
any existing production process, and introduction into the 45 nm
process is questionable, but *may* not be completely out of the
question for Intel.

If you look at Intel's web page, Intel has been sending out press
releases about High-k + metal since 2003, and Intel's own road
map shows high-k + metal @ 45 nm node (with the caveat that roadmap
may change).

http://www.intel.com/pressroom/archive/releases/20031105tech.htm
http://www.realworldtech.com/includes/images/articles/IEDM-Day2-fig7.gif

So the technology has been demo'ed time and again, but there are
still many issues that has to be solved before it can be integrated
into a production process, i.e. Intel's next generation 45 nm process.

Since Intel will likely present details of its 45 nm process by
December of this year, that means the deadline is quickly approaching
for Intel to commit to metal + high-k at the 45 nm node (or not).

I think Laura Peters and I are basing our respective impressions on the
same set of panel discussions. The quick summary is that high-k + metal
is very challenging, and that no one will commit to it at the 45 nm node,
even Intel, which as you can see had high-k + metal on the 45 nm roadmap.
My impression is that Intel may be the closest to delivering high-k + metal
@ 45 nm, but no one else will be able to do it at the 45 nm node, 32 nm
is more likely for everyone else. If Intel doesn't succeed in pulling
in high-k + metal into the 45 nm node, then it too will do it at the
32 nm node.

 

[Yousuf Khan]

?

Not sure what you're asking. They've never been "introduced" into
any existing production process, and introduction into the 45 nm
process is questionable, but *may* not be completely out of the
question for Intel.

That's what was puzzling me. It seems like I've been hearing about
high-k and metal for ages now, but it's always been so much experimental
stuff for the next generation. However the first article made it sound
like high-k and metal were already out-of-date, passe, no longer on the
radar. That also made me think that it was already introduced and now
it's leaving us.

Yousuf Khan

 

[David Wang]

That's what was puzzling me. It seems like I've been hearing about
high-k and metal for ages now, but it's always been so much experimental
stuff for the next generation. However the first article made it sound
like high-k and metal were already out-of-date, passe, no longer on the
radar. That also made me think that it was already introduced and now
it's leaving us.

You're living on Radium-221 half-life time cycles. It's only been
a few years when they started talking about high-k + metal for use
in future processes.

If you re-read the article, I think you'll see that she's talking about
"It's too hard to do at 45 nm", not "we're phasing it out at 45 nm".

 

[Yousuf Khan]

If you re-read the article, I think you'll see that she's talking about
"It's too hard to do at 45 nm", not "we're phasing it out at 45 nm".

So would it get any easier to do at 32 nm?

Yousuf Khan

 

[David Wang]

So would it get any easier to do at 32 nm?

Even harder, but you get another process generation (more time) to
work out all the kinks.

 

[Yousuf Khan]

Even harder, but you get another process generation (more time) to
work out all the kinks.

Then you'd think they'd be trying to integrate them in right now, with
the 90 and 65 nm nodes, so they don't have worry about it by the time
they get to 45 and 32?

Yousuf Khan

 

[David Wang]

Then you'd think they'd be trying to integrate them in right now, with
the 90 and 65 nm nodes, so they don't have worry about it by the time
they get to 45 and 32?

You push forward with process advancements, not backwards. Process
development work is very expensive, and they get paid for by people
paying the $700 per processors and the higher end ASP of $200.

90 nm processes are mature and will (soon) be relegated to manufacturing
low(er) end Celeron-ish type processors only. At that sort of ASP, you don't
push more money into the 90 nm process. You focus on yield improvements
on mature processes. Same story with the 65 nm process. You use them as
test vehicles, but by the time the (metal + high-k) technology matures,
65 nm will be a mature process, and it's time to focus on yield improvement
again. The target is 45 nm, and if that's too tight of a timeline, the you
push it out to the 32 nm node. Moreover, even if you integrate it at the
90/65 nm nodes, you still have to "worry about it" at the 45 and 32 nm
nodes. Each process generation has its own problems. It's just that you get
more experience with technology you've already implemented in a previous
process generation. i.e. Copper interconnects.

 

[Greg]

Then you'd think they'd be trying to integrate them in right now, with
the 90 and 65 nm nodes, so they don't have worry about it by the time
they get to 45 and 32?

Yousuf Khan

There is no way they'd integrate the high-k and metal gate technologies
into the 90nm or even the 65nm process at this point. As far as the
90nm process, there is no need for additional performance as all future
products (other than chipsets) are going to be for 65nm.

Keep in mind that high-k / metal gate process have significant shifts
in transistor threshold voltage. As far as 65nm technology goes, having
to majorly re-tune those finely adjusted implant conditions so that
your new process and old process have identical threshold voltages over
a wide range of transistor lengths is an enormous, slow and expensive
engineering feat.

It certainly stands to reason that high-K / metal gates need to be
introduced as a key feature of the new technology instead of being
introducted into an existing one.

-Greg