CPU temps stable, then rising w/o load?

[S. Whitmore]

Another possible cause of the abrupt shutdown is fan failure. You may have
a fan that is failing intermittently.

Yeah, I thought about that. The time that it shutdown while PC Probe
was running, that software "should" have alerted me to a fan problem.
But it's still a possibility.

Thanks,

 

[keith]

[...]

s/Nearly//

No, some comes out on the logic line and thus does not end up as heat
within the chip. Even more generally including the whole system, if you
use the Schottky clamp method to terminate the logic lines, some of the
power goes back onto the rail.

It still ends up as heat.

The OP was not talking about that sort of CMOS, but point taken.

I'm not a mind reader.

IIRC: The input capacitance of a TTL gate is a bit smaller than that of a
CMOS gate with the same feature sizes.

Likely true, though wiring is wiring, though if you're limiting yourself
to SSI, wiring is likely swamped by the huge transistors.

 

[John Doe]

Ken Smith wrote:
....

I'm not a mind reader.

I wrote:
"I have designed and built lots of [simple] circuits with CMOS logic
(thanks to National Semiconductor's 1988 CMOS logic data book). The
family seemed great for micropower devices including oscillators."

Thanks.

 

[Ken Smith]

No, some comes out on the logic line and thus does not end up as heat
within the chip. Even more generally including the whole system, if you
use the Schottky clamp method to terminate the logic lines, some of the
power goes back onto the rail.

It still ends up as heat.[/QUOTE]

It once again becomes part of the input power to the chip that is running
from the rail. As a result, not all of the power going in ends up as
heat. If it did you'd have some mystery power in the system. Example:

5W Watts comes from the external power supply.
5.1Watts is going into the chip.
0.1Watts is returned to the rail by the Schottkys.

It all cancels.

 

[Ken Smith]

John Doe wrote: [...]

My main question is this:
As operating frequency rises within normal limits, does CMOS become
grossly inefficient compared to other typical forms of logic like
maybe TTL? I don't know much about typical logic families.

[...]
You're the only one who's made the irrational leap from being correctly
told that CMOS power consumption increases with operating frequency to a
claim of 'inefficient'.

There about 6 Billion people in the world. I think we can safely assume
that at least 2 would make an irrational leap. Inn this case however, I
think the OP's idea was that the CMOS gets much worse than TTL at some
point. He was not really correct in this regard but it is an
understandable mistake because the increasing power vs increasing
frequency is less discussed for TTL than CMOS.

In short he was wrong not irrational.

 

[Jim Thompson]

John Doe wrote: [...]

My main question is this:
As operating frequency rises within normal limits, does CMOS become
grossly inefficient compared to other typical forms of logic like
maybe TTL? I don't know much about typical logic families.

[...]
You're the only one who's made the irrational leap from being correctly
told that CMOS power consumption increases with operating frequency to a
claim of 'inefficient'.

There about 6 Billion people in the world. I think we can safely assume
that at least 2 would make an irrational leap. Inn this case however, I
think the OP's idea was that the CMOS gets much worse than TTL at some
point. He was not really correct in this regard but it is an
understandable mistake because the increasing power vs increasing
frequency is less discussed for TTL than CMOS.

In short he was wrong not irrational.

What IS TTL ?

CMOS will easily cover DC to maybe as much as 500MHz, then switch to
(P)ECL.

Why use antiques ?

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice480)460-2350 | |
| E-mail Address at Website Fax480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.

 

[Ken Smith]

What IS TTL ?

CMOS will easily cover DC to maybe as much as 500MHz, then switch to
(P)ECL.

Why use antiques ?

(1) If people weren't fond of using antiques one of us may be unemployed.

(2) The TTL cook book can be found at Good Will for $2.00

(3) I've got a whole bunch of them

(4) There is no reason number 4

(5) We have to interface so some existing equipment.

 

[David Maynard]

John Doe wrote:
[...]

My main question is this:
As operating frequency rises within normal limits, does CMOS become
grossly inefficient compared to other typical forms of logic like
maybe TTL? I don't know much about typical logic families.

[...]

You're the only one who's made the irrational leap from being correctly
told that CMOS power consumption increases with operating frequency to a
claim of 'inefficient'.

There about 6 Billion people in the world. I think we can safely assume
that at least 2 would make an irrational leap.

Not a bad assumption but I was referring to people posting in this
newsgroup, the original thread in particular, and that's considerably less
than 6 billion

Inn this case however, I
think the OP's idea was that the CMOS gets much worse than TTL at some
point. He was not really correct in this regard but it is an
understandable mistake because the increasing power vs increasing
frequency is less discussed for TTL than CMOS.

In short he was wrong not irrational.

He was basing it on another thread, in which I was a participant, and no
one in that thread made any claims of 'inefficient' or 'worse than TTL',
except for him later posting in this thread claiming 'someone' was trying
to tell him "CMOS logic becomes abnormally inefficient."

It was simply pointed out that CMOS power consumption increases with
frequency so if you stop executing instructions it consumes less power, and
that that's one of the things power saving modes take advantage of.

From that description he made the leap to a claim of "abnormally
inefficient" and I say it's an irrational leap since even something that's
100% efficient consumes less energy if you stop doing work.

 

[John Doe]

....

It was simply pointed out that CMOS power consumption increases
with frequency so if you stop executing instructions it consumes
less power, and that that's one of the things power saving modes
take advantage of.

If anyone believes I would dispute that, please read on, you deserve
it, [playing].

These are my comments which David Maynard disputed:

"My recollection is that the input transition being slow is what
causes CMOS to suck current. So you provide a fast switching input.
CMOS is extremely efficient even while operating. I can't imagine
why anyone would think otherwise."

 

[Jim Thompson]

...

It was simply pointed out that CMOS power consumption increases
with frequency so if you stop executing instructions it consumes
less power, and that that's one of the things power saving modes
take advantage of.

If anyone believes I would dispute that, please read on, you deserve
it, [playing].

These are my comments which David Maynard disputed:

"My recollection is that the input transition being slow is what
causes CMOS to suck current. So you provide a fast switching input.
CMOS is extremely efficient even while operating. I can't imagine
why anyone would think otherwise."

"input transition being slow" is rarely a problem... only hackers try
using CMOS inverters as analog input stages ;-)

BUT, CMOS current consumption is determined by CPD (power dissipation
capacitance) such that current draw (not including load capacitances
is...

Ivdd = CPD*f*Vdd

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice480)460-2350 | |
| E-mail Address at Website Fax480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.

 

[JAD]

WGAS? off- topic dribble

its obvious you have some kind of 'bet' to see how long you can keep this
'BORING' -over the top- thread going.

...

It was simply pointed out that CMOS power consumption increases
with frequency so if you stop executing instructions it consumes
less power, and that that's one of the things power saving modes
take advantage of.

If anyone believes I would dispute that, please read on, you deserve
it, [playing].

These are my comments which David Maynard disputed:

"My recollection is that the input transition being slow is what
causes CMOS to suck current. So you provide a fast switching input.
CMOS is extremely efficient even while operating. I can't imagine
why anyone would think otherwise."

 

[Ken Smith]

"input transition being slow" is rarely a problem... only hackers try
using CMOS inverters as analog input stages ;-)

I guess I'm a hacker. I often use a CMOS logic gate to make a crystal
oscillator. That is the one case I suspect that nearly every engineer has
been guilty of hacking on.

BUT, CMOS current consumption is determined by CPD (power dissipation
capacitance) such that current draw (not including load capacitances
is...

Ivdd = CPD*f*Vdd

Important equation left.


Even with slowish edges on the input, this is often the main determining
factor on power. CMOS oscillators have a sinewave input so the percentage
of the time spent in the linear part is always about the same, and yet,
the current in higher frequency oscillators is typically higher.

 

[John Doe]

A persistent troll who cannot find his newsreader's
Ignore Thread key.

 

[David Maynard]

...

It was simply pointed out that CMOS power consumption increases
with frequency so if you stop executing instructions it consumes
less power, and that that's one of the things power saving modes
take advantage of.

If anyone believes I would dispute that, please read on, you deserve
it, [playing].

As
designs advanced, technologies like CMOS developed that consumed
power only when the circuits on the processor were changing
state; the rest of the time, only a tiny amount of current was
drawn.

And you disputed it with:

Really? Yes CMOS logic consumes a tiny amount of power, but
that's not just when idle. If you know of discussion by chip
makers like National Semiconductor, Texas Instruments, Motorola,
or any other well-known manufacturer which supports your
reasoning for the difference in power consumption, I would enjoy
reading that.

These are my comments which David Maynard disputed:

You apparently have have a problem understanding English because my reply
was (interspersed):

"My recollection is that the input transition being slow is what
causes CMOS to suck current.

"That could be a problem, if it happened, because it could potentially keep
the circuit in the active region longer (increasing through current), but
that isn't the normal case since anything connected to a 'slow moving'
signal would have schmitt trigger inputs and on-die transitions are not
'slow'. I mean, you're right in that "if you did this then..." but you
wouldn't do it. "

That is not a 'dispute' of what slow input transitions could do. But then,
that's why a designer avoids them.

So you provide a fast switching input.

"That's 'automatic' since it's all on-die."

CMOS is extremely efficient even while operating. I can't imagine
why anyone would think otherwise."

"'Efficient' is a relative term, but moot since gate switching is a major
source of power consumption and the original reason for 'low power' halt
and sleep states: power is cut by eliminating gate switching.

As devices shrink with ever larger numbers of them on die static leakage
has also become a major problem, which is why processors also turn off
power to sections when they're not being used."

---------------------

I made no claim of either efficient OR inefficient, pointing out that is a
relative term and MOOT because it's irrelevant to the point that was at
hand: that CMOS power consumption increases with operating frequency.
(which would still be true even IF some yahoo microprocessor designer WERE
putting 'slow input transitions' into his speed demon CMOS processor
design, but then that *would* be 'inefficient').

 

[John Doe]

The troll's reply is an illustrated reason why I started this cross
post with "In as many words as possible, someone is apparently
trying to tell me..."

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From: David Maynard <dNOTmayn @ev1.net>
Newsgroups: alt.comp.hardware.pc-homebuilt,sci.electronics.design
Subject: Re: CMOS logic, efficiency versus frequency?
Date: Sun, 13 Feb 2005 16:11:16 -0600
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...

It was simply pointed out that CMOS power consumption increases
with frequency so if you stop executing instructions it consumes
less power, and that that's one of the things power saving modes
take advantage of.

If anyone believes I would dispute that, please read on, you deserve
it, [playing].

As
designs advanced, technologies like CMOS developed that consumed
power only when the circuits on the processor were changing
state; the rest of the time, only a tiny amount of current was
drawn.

And you disputed it with:

Really? Yes CMOS logic consumes a tiny amount of power, but
that's not just when idle. If you know of discussion by chip
makers like National Semiconductor, Texas Instruments, Motorola,
or any other well-known manufacturer which supports your
reasoning for the difference in power consumption, I would enjoy
reading that.

These are my comments which David Maynard disputed:

You apparently have have a problem understanding English because my reply
was (interspersed):

"My recollection is that the input transition being slow is what
causes CMOS to suck current.

"That could be a problem, if it happened, because it could potentially keep
the circuit in the active region longer (increasing through current), but
that isn't the normal case since anything connected to a 'slow moving'
signal would have schmitt trigger inputs and on-die transitions are not
'slow'. I mean, you're right in that "if you did this then..." but you
wouldn't do it. "

That is not a 'dispute' of what slow input transitions could do. But then,
that's why a designer avoids them.

So you provide a fast switching input.

"That's 'automatic' since it's all on-die."

CMOS is extremely efficient even while operating. I can't imagine
why anyone would think otherwise."

"'Efficient' is a relative term, but moot since gate switching is a major
source of power consumption and the original reason for 'low power' halt
and sleep states: power is cut by eliminating gate switching.

As devices shrink with ever larger numbers of them on die static leakage
has also become a major problem, which is why processors also turn off
power to sections when they're not being used."

---------------------

I made no claim of either efficient OR inefficient, pointing out that is a
relative term and MOOT because it's irrelevant to the point that was at
hand: that CMOS power consumption increases with operating frequency.
(which would still be true even IF some yahoo microprocessor designer WERE
putting 'slow input transitions' into his speed demon CMOS processor
design, but then that *would* be 'inefficient').

 

[Jim Thompson]

The troll's reply is an illustrated reason why I started this cross
post with "In as many words as possible, someone is apparently
trying to tell me..."

[snip]

NOW CHILDREN! Amateurs should avoid pissing contests, lest they piss
on themselves ;-)

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice480)460-2350 | |
| E-mail Address at Website Fax480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.

 

[Matt]

Whoa Nelly. I didn't write that. I wish I knew enough to write that.
Could be some other Matt ...

 

[John Doe]

....

NOW CHILDREN! Amateurs should avoid pissing contests, lest they
piss on themselves ;-)

Or run across someone who can piss forever.

 

[John Doe]

David Maynard wrote:

Whoa Nelly. I didn't write that. I wish I knew enough to write
that.
Could be some other Matt ...

It was, but that Matt didn't write it either.

 

[David Maynard]

It was, but that Matt didn't write it either.

My mistake. It was Mxsmanic.