SiS doesn't think AMD's integrated memory controller is a good idea

Y

Yousuf Khan

Chipset house SiS's director was interviewed by Digitimes recently. One
interesting that he said was that he's been encouraging AMD not to keep
integrating the memory controller into the processor.
Q: Designing chipsets for K8 platform would appear to be easier because there is no need to incorporate a memory controller in the northbridge since it's integrated in the processor itself. Does that mean the role of the chipset itself and the chipset maker comes to be less important when we talk about the AMD platform?

A: No, it doesn't. Moreover, I believe we have more experience than AMD in designing memory controllers. Actually, we'd like to see AMD stop putting the memory controller in the CPU. I approached AMD about this several times, but they have their own reasons for integrating the memory controller with the CPU.

Fabless once more – An interview with SiS director Nelson Lee
http://www.digitimes.com/mobos/a20041216PR202.html

Yousuf Khan
 
B

Bob Niland

Apart from the obvious self-interest (it eliminates the
northbridge chip market), what point might SiS being
trying to make here?

Seems like this public message might not be intended
for the public.
 
R

Robert Redelmeier

He may have a small point. Lots of devices (esp AGP vidcards)
do BM-DMA. They're going to experience increased latency
going through the CPU integral MC. But that's probably better
than the CPU suffering the latency with a traditional Northbridge.

-- Robert
 
Y

Yousuf Khan

Bob said:
Apart from the obvious self-interest (it eliminates the
northbridge chip market), what point might SiS being
trying to make here?

Seems like this public message might not be intended
for the public.

I could think of several reasons. The one which seems to make the most
sense to me is that having to continue to make Pentium 4 chipsets at the
same time as Athlon 64 chipsets, their two chipsets are quite different.
They don't get to save on not having to make a memory controller
anymore, since they still have to make Pentium 4 chipsets.

Yousuf Khan
 
Y

Yousuf Khan

RusH said:
yes, in designing ASS CHEAP SLOW memory controllers ....

They were among the faster memory controllers in the early Athlon
Classic/Athlon XP days. And they didn't have the typical compatibility
problems that VIA typically gets when they push their performance too far.

Yousuf Khan
 
R

Rob Stow

Bob said:
Apart from the obvious self-interest (it eliminates the
northbridge chip market), what point might SiS being
trying to make here?

Seems like this public message might not be intended
for the public.

The AMD64 processors do *not* have to use the built in memory
controller. There is nothing stopping SiS from building an
AMD64 chipset with its own memory controller - but they'll
have a hard time getting anyone to use such a chipset unless
they can demonstrate concrete advantages.
 
T

Tony Hill

Chipset house SiS's director was interviewed by Digitimes recently. One
interesting that he said was that he's been encouraging AMD not to keep
integrating the memory controller into the processor.


One of SiS' main market is integrated video chipsets, and the on-die
memory controller of the Athlon64 is a bit of a hindrance for this.

That being said, SiS is barking up the wrong tree if they want AMD to
stop. Their best argument is that it will slightly slow performance
at the low-end of things with integrated video, where performance
doesn't mean much. On the flip side though, the integrated memory
controller offers tremendous performance advantage for high-end
systems with add-in video cards and where performance is important.

As for AMD vs. SiS memory controller designs, I'd take an AMD one any
day.
 
R

RusH

Yousuf Khan said:
They were among the faster memory controllers in the early Athlon
Classic/Athlon XP days. And they didn't have the typical
compatibility problems that VIA typically gets when they push
their performance too far.

I might be biased, i used to "work" on sis630, the slowest P3 ever.
Sandra showed Celeron 266 memory "performance" on a 133MHz CPU.

Pozdrawiam.
 
N

nobody

Chipset house SiS's director was interviewed by Digitimes recently. One
interesting that he said was that he's been encouraging AMD not to keep
integrating the memory controller into the processor.


Fabless once more – An interview with SiS director Nelson Lee
http://www.digitimes.com/mobos/a20041216PR202.html

Yousuf Khan

If SIS thinks it can do better with their own memory controller in
northbridge, there's nothing that prevents them from doing so. K8
family of processors can access memory either through their own
integrated controller or through external memory controller as long as
it has hypertransport link. Case in point - dual Opty boards where
only CPU 0 accesses the memory directly, and CPU 1 goes through 0. I
doubt though that this would bring any benefits in terms of
performance. What it could do is making easier switch to different
type of memory (such as DDR2 when it comes up to speed - 667? 800?)
 
Y

Yousuf Khan

If SIS thinks it can do better with their own memory controller in
northbridge, there's nothing that prevents them from doing so. K8
family of processors can access memory either through their own
integrated controller or through external memory controller as long as
it has hypertransport link. Case in point - dual Opty boards where
only CPU 0 accesses the memory directly, and CPU 1 goes through 0. I
doubt though that this would bring any benefits in terms of
performance. What it could do is making easier switch to different
type of memory (such as DDR2 when it comes up to speed - 667? 800?)

Well, maybe they can do this, i.e. offer a DDR2 interface for the
DDR-only Athlon 64's. But from what I've heard, AMD is already ready
with the DDR2 circuitry in its chips -- they'll just lay dormant inside
while AMD transitions over to the next socket format (the one with over
1200 pins). So at best, it'll be a good short-term feature that SiS can
market to people who want to upgrade to DDR2 but don't want to give up
their older Athlon 64's.

Yousuf Khan
 
T

Tony Hill

The AMD64 processors do *not* have to use the built in memory
controller. There is nothing stopping SiS from building an
AMD64 chipset with its own memory controller - but they'll
have a hard time getting anyone to use such a chipset unless
they can demonstrate concrete advantages.

Considering that the performance of such a design would pretty much
suck-ass from a performance standpoint, there would be exactly zero
advantages and it would cost more... I would say that convincing
companies to use such a chipset would be a VERY difficult task.

The simple fact of the matter is that integrated memory controllers on
CPU dies is the way to go. Everyone except Intel has already
recognized that.
 
Y

Yousuf Khan

RusH said:
I might be biased, i used to "work" on sis630, the slowest P3 ever.
Sandra showed Celeron 266 memory "performance" on a 133MHz CPU.

SiS used to be known for some cheap-ass performance. I can recall back
to the original Pentium days, I helped a friend obtain a Pentium 90
mobo, and then helped him return it too. It was horrible performance,
but had excellent features (except the features ran slowly). :)

However, I later obtained an ECS K7S5A motherboard with the SiS 735
chipset, and it's still running this machine to this day. The most
long-lived motherboard I've had yet. And I had originally bought it
because it was cheap, so I wasn't expecting it to be too long lived. I
just assumed at the price I paid for it, I'll have recouped my
investment very quickly, even if it goes out after a year. Still running
4 years on.

Yousuf Khan
 
Y

Yousuf Khan

Tony said:
One of SiS' main market is integrated video chipsets, and the on-die
memory controller of the Athlon64 is a bit of a hindrance for this.

That being said, SiS is barking up the wrong tree if they want AMD to
stop. Their best argument is that it will slightly slow performance
at the low-end of things with integrated video, where performance
doesn't mean much. On the flip side though, the integrated memory
controller offers tremendous performance advantage for high-end
systems with add-in video cards and where performance is important.

I've never seen anybody play up the "my integrated video controller is
better than yours" hand.

You got integrated video? Dude, you're getting a video card (/any/ video
card).

Yousuf Khan
 
G

George Macdonald

Uh, what exactly is that a link to above?

A Usenet Message ID - if your newsreader doesn't support it, sorry... but
you can plug it in at Google Groups.

Rgds, George Macdonald

"Just because they're paranoid doesn't mean you're not psychotic" - Who, me??
 
T

Tony Hill

Well, actually Intel *has* recognized it now:

Err.. have they?!?

From this very link:

"Intel's current front-side system bus design should be able to keep
as many as four cores satisfied, depending on their frequency, said
Stephen Pawlowski, an Intel senior fellow"

Seems to me like Intel does NOT have any plans for an integrated
memory controller. In fact, that whole article is just more people
echoing what we've all been saying in this newsgroup for a little bit,
that sooner or later Intel HAS to integrate their memory controller if
they want to remain at all competitive. Still, in this article they
continue to sound like they're in denial. 4 cores off a front-side
bus design?! One only needs to look at just how poorly the 4
processor Xeon performs relative to the Opteron to realize that the
above-mention "Intel senior fellow" is smoking some wacky stuff.
 

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