[Q] DDR Ram ...."Pass data on both the rising edge and falling edge..."

[redbrick]

What exactly does this phrase mean? I'm just trying to understand this
concept... I think I can understand how passing and recieving at the
same time can double the performance of memory...but what exactly is the
rising and falling edge? Is this just a jargon for refreshing memory?
I'm a bit behind on this... Why 'edge?' As opposed to????


Thanks...

Redbrick...who Loves his CLK

 

[Kai Harrekilde-Petersen]

What exactly does this phrase mean? I'm just trying to understand this
concept... I think I can understand how passing and recieving at the
same time can double the performance of memory...but what exactly is the
rising and falling edge? Is this just a jargon for refreshing memory?
I'm a bit behind on this... Why 'edge?' As opposed to????

Single Data Rate (SDR) looks like this:

____ ____ ____ ____
Clk ____/ \____/ \____/ \____/ \___
_____ _________ _________ _________ _______
Data _____X_________X_________X_________X_______

Ie, there is one transfer of data (usually on the rising edge of Clk)
per clock cycle.

Double Data Rate (DDR) looks like this:

____ ____ ____ ____
Clk ____/ \____/ \____/ \____/ \___
_____ ____ _____ ____ ____ ____ ____ ____ _
Data _____X____X_____X____X____X____X____X____X_

Since data is transfered on both the rising and falling edge of the
clock, you transfer twice as much data. Hence, Double Data Rate.

HTH,


Kai

 

[assaarpa]

I'm a bit behind on this... Why 'edge?'

Since the voltage must go down to be able to go up again, engineers figured
that they could use both rise AND fall of the voltage for timing because
both events are detectable.

As opposed to????

Nothing, there is no substitute, in SDR memory only rising edge is used for
timing.

 

[emmanuel poirier]

redbrick a écrit :

What exactly does this phrase mean? I'm just trying to understand this
concept... I think I can understand how passing and recieving at the
same time can double the performance of memory...but what exactly is the
rising and falling edge? Is this just a jargon for refreshing memory?
I'm a bit behind on this... Why 'edge?' As opposed to????


Thanks...

Redbrick...who Loves his CLK

Hi !

All electronic chips use a clock to work with others chips.
With SDR, the RAM can be accessed only when the clock signal is on the
top (the clock signal is a square signal :


Top
******* *******
* * *
* * *
* *******
bottom
).

With DDR the RAM is read one time at the TOP signal and one time at the
bottom, so it doubles the throughput.

Replace top with rising edge and bottom with falling edge and that's it.

 

[redbrick]

Thanks for the lesson.

Redbrick..who Loves his CLK

 

[Yousuf Khan]

What exactly does this phrase mean? I'm just trying to understand
this concept... I think I can understand how passing and recieving
at the same time can double the performance of memory...but what
exactly is the rising and falling edge? Is this just a jargon for
refreshing memory? I'm a bit behind on this... Why 'edge?' As
opposed to????

The "edge" refers to the electrical signal waveform that goes into the
electronic circuitry. It looks like a series of zipper teeth -- sharply up,
and sharply down. Usually most clock events are triggered by either the
leading edge (when the voltage is rising) or on the trailing edge (when the
voltage is falling). When both the leading and trailing edges cause a clock
event, then you have a DDR.

Yousuf Khan

 

[daytripper]

Thanks for the lesson.

Here's two more:
- never reply to your own post. it's unseemly.
- don't top post. it's unruly.

Redbrick..who Loves his CLK

Well, it is indeed a brick - but is it red?

/daytripper (S4, dines on CLKs and other posers ;-)

 

[keith]

Here's two more:
- never reply to your own post. it's unseemly.

....unless it's a mea culpa to stop getting trashed for making an obvious
mistook. ;-)

- don't top post. it's unruly.

Unruly? No, it simply sucks! Words are meant to be read. Making it
harder for the reader is counter-productive.

Well, it is indeed a brick - but is it red?

When embarrased, sure.

/daytripper (S4, dines on CLKs and other posers ;-)

Slurp! ;-)

 

[keith]

The "edge" refers to the electrical signal waveform that goes into the
electronic circuitry. It looks like a series of zipper teeth -- sharply up,
and sharply down.

Well...

- One doesn't really like the "bumps" of a zipper in the *transisitons*

- One really should be careful with zipper teeth, particularly with the
"sharply up" motion.

Usually most clock events are triggered by either the
leading edge (when the voltage is rising)

*Transition* from low to high.

or on the trailing edge (when
the voltage is falling). When both the leading and trailing edges cause
a clock event, then you have a DDR.

^^^^^^^^^^^
data event

 

[daytripper]

Well...

- One doesn't really like the "bumps" of a zipper in the *transisitons*

- One really should be careful with zipper teeth, particularly with the
"sharply up" motion.


*Transition* from low to high.

^^^^^^^^^^^
data event

Rising, falling? It's a differential clock y'all are talking about!

/daytripper (listening to all the popping aneurysms ;-)

 

[keith]

Rising, falling? It's a differential clock y'all are talking about!

True, makes no difference to me, neither. ;-) ...but watch them fast
rising zippers! Monica, et. al. had rather the opposite problem though.