Ken said:
David Maynard wrote:
Ken wrote:
John wrote:
My PC has a K7S5A V1.0 motherboard. It has 256M of memory in slot
DDR1.
I feel like adding a further 256M. What should I be looking for?
Is a single 512 better then 2 x 256?
Although I do not have this version of MB (I have K7S5A pro
v.5.0), you might encounter a problem with a single 512 MB stick.
I installed a Kingston Value Ram PC2700 512MB stick and encountered
errors even though the stick passed on a friends computer
(different MB) easily.
You don't say what kind of errors but it sounds like the typical
"high density" memory problem.
Each DIMM socket in the K7S5A supports two ranks with up to 256 Meg
in each rank for 2x256=512 Meg max total per slot (and 2 slots makes
the 1 gig maximum). A "standard" 512 Meg stick is made that way: 256
Meg per rank and 2 ranks.
A "high density" DIMM, however, has the whole 512 Meg in one rank
and, so, exceeds the slot's capacity.
You may well be correct about the "Rank" thing. Personally, I
don't fully understand it. I DO understand that the memory circuitry
is sometimes designed to see the memory in different configurations,
such as low density and high density. One would think however if the
density were the problem, that the full size would not be detected
during POST.
That is often what happens, yes.
I have seen many situations were this was the case, and it made
sense when it detected only half of the memory on the installed
stick. Apparently there is a factor in addition to the density that
will cause memory to not be used effectively?
Yes. Another is loading of the memory bus. The 'high density' modules
put more chips on the bus and that can cause problems.
I don't mean this as a critical remark, but only as a fact: You
apparently know much more about the access circuity of memory on MBs
than I do. Although I am curious about the "Rank" thing, I have read
an explanation (perhaps even written by you) and still do not fully
understand it. I am afraid it is going to take a graphic
illustration for this old fart to understand rank.
I understand. It isn't easy to visualize if you're unfamiliar with it.
You have a memory address and how much memory can be addressed is
determined by how many bits are in the address. It's binary, of
course, so it goes as the power of 2. 1 bit has two states (2^1). 2
bits have 4 states (2^2), 3 have 8 (2^3), 4 have 16 (2^4), 5 have 32
(2^5), 6 have 64 (2^6) and so on (2^x). Call this how 'deep' the
memory can be. (remember 2^5 and 2^6 as we'll use those below)
Now, memory also has data 'width'. For a P4 memory bus that's 64 bits
wide which, a byte being 8 bits, comes to 8 bytes.
So think of it as an XY 'stack' of memory cells. Call Y the memory
addressing and call it the 'depth' of the stack. Call X the memory
data bus and call it 'width'. The address bits are decoded to an
address # on the chip, so, for 5 bits of addressing (32) the stack
looks like
address # 31 --> ========
...
address # 3 --> ========
address # 2 --> ========
address # 1 --> ========
address # 0 --> ========
01234567 memory width X (8 bytes, each byte[=] is 8
bits)
^^^^^^^^
||||||||
vvvvvvvv
The memory controller asks for memory location Y and gets, all
together in one stroke, 8 bytes of data on the memory bus (or sends
data to it).
Lets use a small address space to make the numbers simpler. Say we
have 5 address lines so we can address up to 32 (2^5) memory locations
(in binary we number from 0 to 31) and they're 64 bits wide so that
totals 32 x 64 for 2048 bits. Since bytes are 8 bits, in bytes that's
32 memory locations deep by 8 bytes (64/8) wide so our total memory
capacity is 256 bytes. This is going to be our "rank" (just accept
that for the moment)
So, we have a system with a certain addressing capacity, 256 bytes,
and now we're going to put memory chips into it. And you may have
guessed that our capacity of 256 bytes resembles 256 meg if you
multiply by a binary meg.
Memory chips are organized the same way, a depth and width, and the
'standard' width is 8 bits so it takes 8 chips, side by side, to fill
our 64 bit wide memory data bus (rank). Since we have a maximum of 5
address bits it's clear that the largest chip we can use is 32 bits
deep and 8 of them makes 256 bytes. The combined width always needs to
be 64 bits, because that's the data bus width, but we can use chips
with less memory depth, like 16 bits deep for 128 bytes, but not
deeper ones because we don't have more than 5 address lines.
Now, to describe the memory chip's organization we'll say it's "32x8"
since that's it's depth (32 bits) and width (8 bits). It's a "256 bit,
32x8, memory chip" and 8 of them, 'side-by-side', make up a rank that
totals 256 bytes and everything matches our system's maximum capacity.
(btw, 32x8 is a standard chip size in real life as the 32 is in
megabytes)
Now we'll clarify 'rank' a bit more. We can fit more than 8 chips on a
stick so lets mount 16 on it, 8 chips on each side. We need some way
to select which 'side' of 8 chips is being addressed, because we still
only have 5 address lines, so we design a select signal. It need be
just 1 bit so we can select one or the other side of chips, 0 or 1,
which allows us to use both 'sides' of the memory stick we've made.
Note that adding an address line would not do us any good since the
chips are still only 32 bits deep and the added address line would
have nothing to address. We need a 'third dimension', so to speak, to
select which side of 8 chips we want to use. And, in fact, 'side' used
to be how it was described. I.E. a "single sided" or "double sided"
stick. But, as we'll see below, using "side" no longer works so a new
name was devised and that name is "rank". Rank is the chips that fill
up one 64 bit wide memory bus with whatever depth they have. Ours are
32 bits deep and our new memory stick has two ranks (what we began by
calling two sides) for 2 times 256 bytes, 512 bytes total.
This is our 512 memory stick. 2 ranks with 256 per rank and, as it
turns out, that's 8 chips on one side of the stick and 8 on the other.
2 ranks, 2 sides. It means the same thing here.
SIDE 0 SIDE 1
RANK 0 RANK 1
select select
| |
V V
address # 31 --> ======== ========
...
address # 3 --> ======== ========
address # 2 --> ======== ========
address # 1 --> ======== ========
address # 0 --> ======== ========
01234567 01234567
|||||||| ||||||||
------------------- the rank selected feeds through
^^^^^^^^
||||||||
vvvvvvvv
01234567 memory width 8 bytes (64 bits)
Now comes along 'high density' memory chips, but what makes them 'high
density? Well, they change the internal organization of the chip to be
64x4 (instead of the standard 32x8). I.E. 64 bits deep but only 4 bits
wide. They have the same total number of bits (32x8 = 64x4) but it now
takes 16 of them to fill up that 64 bit wide memory bus (64/4= 16). So
more of them can be packed into one rank, exactly twice as many, and
since they're the same total capacity as the "standard" chips that
means more memory in the one rank, which is how they come up with the
not-so-clear term 'high density'. It's still 16 chips, just like our 2
rank stick, with a memory capacity of 512, just like our two rank
stick. Everything sounds pretty much the same...
**BUT NOTICE*** the depth is now more than the number of address lines
we have. Remember our binary table at the very beginning. 64 bits deep
takes *6* address lines and we only have 5! And that means we can only
address HALF the memory in that 'high density' module even though the
total number of bytes is exactly the same as our two rank stick.
They're both a "512 memory stick" but, the problem is, the whole 512
is all 'high density' packed into ONE rank.
Here's our 512 'high density' memory stick
Both sides used There is no second rank
RANK 0 RANK 1
select select
| |
V ---
address # 63 --> ================
...
address # 35 --> ================
address # 34 --> ================
address # 33 --> ================
address # 31 --> ================ <---The maximum we can address
...
address # 3 --> ================
address # 2 --> ================
address # 1 --> ================
address # 0 --> ================ <---Two 4 bit chips per byte
0 1 2 3 4 5 6 7
| | | | | | | |
---------------------------------------------
^^^^^^^^
||||||||
vvvvvvvv
01234567 memory width 8 bytes (64 bits)
Also note that it still takes 16 chips with 8 on each side. It's
"double sided," physically, but there's only one rank. And this is why
"double sided" no longer works for the purpose. It used to be
equivalent to two ranks but now, which is it? One rank or two? It
depends on what chips are used and it's rank that tells the correct
story, or deducing it by the chip organization. Remember, standard
chips are x8 and 'High Density' are x4.
Also look at our rank select line. With standard density chips it only
has to drive 8 chips but with 'high density' it has to drive twice as
many, 16, and electronic signals tend to slow down as the number of
driven chips increases so, if the select line circuitry is marginal
(or intended to drive 8 x8 chips), doubling the memory chips on it can
cause erratic operation if it doesn't quite 'get there' fast enough.
I do appreciate your comments, and I am sure that others less
dense than myself will understand them fully. My only purpose in
posting my comments were to alert the OP that not all memory will
work on a given MB. Thanks again for your comments.
You're quite right. I was just trying to help in determining which
kinds of memory are potentially problematic and why. In general it's
safer to stay away from 'high density' even if it fits within the rank
capacity, because of the drive problem, unless the motherboard
specifically states it supports them (in which case we hope they've
increased the drive capability to accommodate them).
The advice to seek a size and brand that has been proven to work
is good advice on this MB. I might add that I have two sticks of
PC 2700 256MB installed and it works flawlessly. One is a Kingston
VR and the other a Nanya. Your results may vary.
