Is IBM "cell" chip a replacement of Intel CPU or ATI/NVidia GPU?

[Tony Hill]

How simple is it, Tony? ;-)

Well now, that's the real question, isn't it. It definitely does seem
that somewhere along the lines the whole concept of a VLIW core got
horribly mangled with the Itanium such that it is no longer a simple
core at all.

Hence the reason why I mention the *idea* of Itanium and not the
reality of the Itanium we have today! :>

Seriously, how does the die area compare with that of x86 chips such
as the OOO Opteron and the non-OOO Via chips (exclusive of caches)? I
knew the Itanium was *different*, but I didn't realize it was
*simpler*.

Well, again the theory of VLIW is that it's really quite a simple
design because ALL the magic of dumped off to the compilers. All the
core should really have to do is crunch numbers, which is actually the
easy part. Tossing data around is what tends to make processors
complicated, but normally it's required to get good performance.

Now, how does this all relate back to the Itanium? Well, about all
I've got to go on is die photos vs. known die area, ie this:

http://www.intel.com/design/itanium2/download/Madison_slides_r1.pdf

In the photos we can easily see that the cache is taking up at least
2/3rd of all the die (for a 6MB L3 version at least), but that die is
already something like 374mm^2 (130nm process). Even if we say that
the processor core is only 1/4 of the die, that's still 93.5mm^2.

For comparison, VIA's entire C3XL chip, cache and all, is only 52mm^2
on a 130nm process. Ok, granted it's rather tough to compare the VIA
C5 processor to Intel's Itanium as performance wise, they are not only
in a different ballpark, they're in a whole different sport. Perhaps
a better comparison here would be the VLIW Transmeta Efficeon, at
~120mm^2 vs. the VIA C5 at 52mm^2, both offering similar performance
and power consumption.

As for the Opteron, on a 130nm process the entire die is 193mm^2, but
nearly half of that is L2 cache. So, given the rough estimates here
it would indeed seem that the Itanium2 core probably hasn't really
lived up to the idea of VLIW to make a simple core.

 

[keith]

Well, it's not exactly elegant, either. Our new processors would be
less complex, and thus possibly cheaper and faster, if they didn't
need to support such a "kludgy" ISA...

I don't think that's true anymore. The core of X86 chips has grown
increasingly RISCy. The inscruction decoder is the only part of the chip
that is CISCy, which isn't all that big, in relationship to the rest of
the chip.

 

[Arthur]

Oh, how we race to
our next bottleneck.

The contenders were
1. Intel 8080
2. Motorola 6800
3. 6502 Apple, Commodore, ?
4. RCA ???? CMOS cpu

IBM said 8080 and thus it was.
Then IBM said MS DOS and thus it was.

Who now say it? Market who?

arthur

 

[keith]

Oh, how we race to
our next bottleneck.

The contenders were
1. Intel 8080
2. Motorola 6800
3. 6502 Apple, Commodore, ?
4. RCA ???? CMOS cpu

^^^^ 1802? (last seen streaking out of the solar system)

IBM said 8080 and thus it was.

Huh? Did IBM *ever* have an 8080 based system? 8085, yes (DataMaster),
8086/8, obviously. ...but 8080??

Then IBM said MS DOS and thus it was.

No, the market said.

Who now say it? Market who?

From your headers you seem to like M$ and x86 well enough. You are the
market, and you have spoken. ...next!