http://community.zdnet.co.uk/blog/0,1000000567,10005497o-2000331777b,00.htm
Intel Larrabee roadmap -- who says there ain't no Santa Cores?
Posted by Rupert Goodwins
More news is leaking out about Larrabee, Intel's many-core x86
project. According to what Google translates as Hiroshige's Goto
Weekly from Japan, there'll be 24 and 32 core variants out in 2009 and
a 48 core chip in 2010. The 24 core variant may even be the 32 core
version in disguise, as a way to ship useful parts when one or more
cores don't work.
Picking my way carefully through the Googleised Japanese, it appears
that the first product Larrabee may appear in is a PCI Express 2
accelerator card - mostly for graphics, but with plenty of other
options for tasks that like lots of high speed floating point. That's
where most of the x86 instruction set enhancements will come too,
together with specialised parallel control instructions. That makes
for interesting comparisons with IBM's Cell, which has a conventional
Power PC core doing control and housekeeping and entirely incompatible
processor units managing the heavy lifting.
Oh, and please not to be confusing the Larrabee with the Polaris,
Intel's other public many-core chip. Polaris is not x86, it's not
going to be a product, it's a testbed and, aside from having lots of
cores (80, as opposed to Larrabee's 24-48) there's not much
similarity. Polaris uses a cross-switch matrix for core
interconnection, Larrabee a 256-byte-per-cycle ring; Polaris has
stacked memory, Larrabee multiple on-chip DRAM controllers (as far as
I can tell)...