A
AirRaid
The first generation of chips & boards in the Larrabee family is still
at least 1 year away, and somewhat longer if they don't launch until
2010. These will consist of chips as small as 4-8 cores, and as
large as 48 cores, perhaps even 64 cores. They could also consist of
dual-Larrabee boards.
Yet, Intel is already working on the Larrabee 2 generation.
http://forum.beyond3d.com/showthread.php?t=50102
_________________________________________________________________________
Pre-Si Emulation Engineer – 560430
Description
In this position, you will be part of an exciting team developing and
deploying state-of-art Emulation technologies for validation of Intel
Larrabee (LRB) Graphics processors. You'll be focusing on some of the
responsibilities that include but are not be limited to:
- Responsible for the Emulation Model Builds including RTL coding,
linting, synthesis and others
- Developing and executing validation plans for Emulation including
test-bench/ tests development, debug and others
- Working with Pre/Post Si Validation teams, SW OS and/or driver and/
or Application teams to develop and execute emulation solutions for
LRB2
- Working with design teams, and tool vendors to execute LRB2
Emulation plans, develop tool methodologies and flows and others
- Working on full-chip, system-level, sub-FC validation for emulation
Quote:
LRB Front-End Logic Design Eng – 558503
Description
In this position, you will be playing a key technical role in front
end development of the LRB2 design. Your responsibilities will include
but not be limited to:
- Micro-architecture development and RTL design of one or more complex
functional units
- Working with architecture teams to scope out implementation costs,
power-performance tradeoffs and propose alternative solutions
- Working with validation teams to drive appropriate validation
strategies and actively contributing to a high quality design
- Working with backend teams to enable convergence to meet aggressive
design targets
- Contributing to advancing design processes/design methodologies
at least 1 year away, and somewhat longer if they don't launch until
2010. These will consist of chips as small as 4-8 cores, and as
large as 48 cores, perhaps even 64 cores. They could also consist of
dual-Larrabee boards.
Yet, Intel is already working on the Larrabee 2 generation.
http://forum.beyond3d.com/showthread.php?t=50102
_________________________________________________________________________
Pre-Si Emulation Engineer – 560430
Description
In this position, you will be part of an exciting team developing and
deploying state-of-art Emulation technologies for validation of Intel
Larrabee (LRB) Graphics processors. You'll be focusing on some of the
responsibilities that include but are not be limited to:
- Responsible for the Emulation Model Builds including RTL coding,
linting, synthesis and others
- Developing and executing validation plans for Emulation including
test-bench/ tests development, debug and others
- Working with Pre/Post Si Validation teams, SW OS and/or driver and/
or Application teams to develop and execute emulation solutions for
LRB2
- Working with design teams, and tool vendors to execute LRB2
Emulation plans, develop tool methodologies and flows and others
- Working on full-chip, system-level, sub-FC validation for emulation
Quote:
LRB Front-End Logic Design Eng – 558503
Description
In this position, you will be playing a key technical role in front
end development of the LRB2 design. Your responsibilities will include
but not be limited to:
- Micro-architecture development and RTL design of one or more complex
functional units
- Working with architecture teams to scope out implementation costs,
power-performance tradeoffs and propose alternative solutions
- Working with validation teams to drive appropriate validation
strategies and actively contributing to a high quality design
- Working with backend teams to enable convergence to meet aggressive
design targets
- Contributing to advancing design processes/design methodologies
