Did Intel ever develop its own x86-64 a long time ago?

[Rob Stow]

I'm actually a little surprised that anyone would care at Intel
anymore. Afterall, EM64T is already with us, and therefore Intel's x64
is a done deal. So coming clean about the distant past would be nothing
more than clearing the air.

It could be just office politics. There are undoubtedly still
bigwigs at Intel who did boneheaded things on the way to EMT64.
Bigwigs with the clout to keep embarrassing documents out of the
public domain ..

 

[YKhan]

I don't believe the "old" cross-licenses extended to these new
features, though. For example when Intel added MMX, AMD responded
with a different solution (3D-now). AMD finally adapted SSE, of
course, but lagged Intel by a generation.

You're probably thinking of 3DNow vs. SSE; 3DNow wasn't competing
against MMX. MMX was unique in that both Intel and AMD introduced MMX
at the exact same time. MMX was the distinguishing feature of its
Pentium MMX processor, vs. Pentium classic. MMX was the distinguishing
feature of its K6 processor vs. K5. Even old Cyrix came out with MMX on
its 6x86 and M6 processor cores a few months later.

Intel deliberately licensed MMX to its competitors simultaneously
because it wanted MMX to become widely distributed; there were rumours
prior to that that both Cyrix and AMD were developing their own
incompatible SIMD instruction sets in parallel with Intel; so Intel
licensed their software interfaces to the competitors so that they can
all remain compatible. It was a purely for-the-good-of-the-industry
type of decision. I'll grant that's very unusual for Intel.

But I think back then Intel was licensing the extensions as they were
being developed. Not long afterwards, they came to a wide-ranging
cross-license agreement with AMD. That was the agreement where AMD
agreed to stop using Intel buses in exchange for being granted full
rights to all future extensions to x86. Of course that cuts both ways,
so when AMD developed extensions to x86, Intel immediately got access
to it. Also when AMD developed its own point-to-point bus, Intel had no
access to it.

As for 3DNow!, if you'll recall that was a floating-point SIMD, whereas
MMX was an integer SIMD. 3DNow! was actually built on top of MMX, using
the exact same register set (i.e. same as the x87 FPU). It was also
very cleverly leveraging the x87's existing support to make for a very
backward-compatible extension which required no modifications to
operating systems at all. Support for SSE required some rewrites of the
OS kernel.

Suddenly AMD is at the same version SSE as Intel, and Intel is using
AMD 64-bit extensions. So I'm thinking they negotiated the trade I
mentioned.

Yeah, I think that all came about after the big cross-license
agreement. AMD didn't have support for SSE right away because it was
trying to get their own 3DNow! accepted, so it didn't want to dilute
its 3DNow message. I believe it was expecting to win the original Xbox
contract to turn 3DNow into a defacto standard. Once you have millions
of video game consoles running that instruction set, it'll flow back to
PCs which may get versions of the games later on. Of course, Intel won
that contract, and soon after AMD adopted SSE as well. And Xbox never
took off or was as influential as originally thought, and there wasn't
any real flow back and forth between PCs and Xboxes.

Yousuf Khan

 

[George Macdonald]

Not really, I think there was just a hard 'party line', and everyone
followed it up until it was changed. However, there were efforts to do
64b x86 long before that party line was formulated (and was possibly
the catalyst for such a formation).

Yes *REALLY*. Is Intel so ****in' arrogant that they think they can get
away with this crap and not lose credibility?

 

[George Macdonald]

We can let Rattner and Wirt get away with simply "toeing the company
line" when it came to not mentioning the Yamhill project, which would
come later. That's because we're not so interested in Yamhill in this
case. Yes, we know Yamhill actually did come true, it's now part of
recent history. Yamhill was a response, but it wasn't self-initiated.

"Yamhill... come later" than what? Yamhill had been denied long before
those comments of the Feb' 2003 IDF. Prescott had the extensions already
implemented in hardware as analyzed by www.chip-architect.com in April
2003.

But we're more interested in the older history. Was there ever an x64
project at Intel prior to AMD64's appearance (and of course, prior to
Yamhill)? Wirt says, "Well kinda, but we didn't get too deep into it."
This is where there is a mystery. They're using purposefully vague
phrases like "cost ineffective", which doesn't say how serious they
were about it, and how far they got. It also doesn't say how
technically feasible it would've been, because "cost ineffective" could
either mean in relative terms (cost ineffective against IA-64), or
absolute terms (way too expensive to modify existing 32-bit designs).

I know Dave Wang posted here a while back about Intel's early x86-64
research/development... IIRC one study post dated the original Pentium, so

10 years ago... when die real estate was a bigger issue of course.

I'm actually a little surprised that anyone would care at Intel
anymore. Afterall, EM64T is already with us, and therefore Intel's x64
is a done deal. So coming clean about the distant past would be nothing
more than clearing the air.

It would also involve (re-)airing the M$ edict on x86-64 ISA again and that
was a touch mouthful... still stuck in the corporate craw.

Oh and BTW it now looks like AMD's I/O virtualization layer has M$'s
endorsement. If Intel wants to impose their rulez again they'd better get
a move on.

 

[Yousuf Khan]

"Yamhill... come later" than what? Yamhill had been denied long before
those comments of the Feb' 2003 IDF. Prescott had the extensions already
implemented in hardware as analyzed by www.chip-architect.com in April
2003.

But the early AMD64 instruction set, known at the time as x86-64, was
probably already in publication by 2000. So Yamhill was still a response
to it.

I know Dave Wang posted here a while back about Intel's early x86-64
research/development... IIRC one study post dated the original Pentium, so
10 years ago... when die real estate was a bigger issue of course.

It would be interesting to know how similar that one was to the AMD64
specification that eventually arose. I'm betting they didn't do things
like doubling the number of registers at such an early age. Probably
adding registers would've really showed up on the die size at that time;
these days it's just an afterthought.

They most likely would've gotten rid of the segment registers at that
time still. But would they have tried to implement the whole address
space using 4K pages, or would they have still come up with extended
page sizes? And it's a toss-up whether they'd come up with a No Execute
bit in the page table to replace the code vs. data distinction available
through the segments?

It would also involve (re-)airing the M$ edict on x86-64 ISA again and that
was a touch mouthful... still stuck in the corporate craw.

Oh and BTW it now looks like AMD's I/O virtualization layer has M$'s
endorsement. If Intel wants to impose their rulez again they'd better get
a move on.

Now is the I/O Virtualization specs that AMD has, is that part of its
Pacifica specs, or is it independent? I read through the IOMMU PDF from
AMD, and it sounds like stuff that's already in the processors not stuff
that was added.

Yousuf Khan

 

[George Macdonald]

But the early AMD64 instruction set, known at the time as x86-64, was
probably already in publication by 2000. So Yamhill was still a response
to it.

Yeah, OK... later in that sense.

Now is the I/O Virtualization specs that AMD has, is that part of its
Pacifica specs, or is it independent? I read through the IOMMU PDF from
AMD, and it sounds like stuff that's already in the processors not stuff
that was added.

Dunno if this
http://www.reed-electronics.com/electronicnews/article/CA6305441.html is
more than what you already have. It basically extends the CPU layer out to
I/O device control.

 

[David Kanter]

It would be interesting to know how similar that one was to the AMD64

specification that eventually arose. I'm betting they didn't do things
like doubling the number of registers at such an early age.

I'm pretty certain you are wrong on that account. Adding registers
isn't a problem, since the P6 already had more physical than logical
registers. Moving to 16 regs would just eliminate a lot of pointless
instructions caused by spills and fills.

Probably
adding registers would've really showed up on the die size at that time;
these days it's just an afterthought.

No, I think it's pretty safe to say that 8 registers won't make a
difference for the PPro, although they'd certainly need to redesign the
core.

They most likely would've gotten rid of the segment registers at that
time still. But would they have tried to implement the whole address
space using 4K pages, or would they have still come up with extended
page sizes? And it's a toss-up whether they'd come up with a No Execute
bit in the page table to replace the code vs. data distinction available
through the segments?

I think it really depends on what was going on with RISCs at that time
frame. Basically, AMD and Intel have both been acquiring features that
higher end architectures have had. They both look to the same places
for future features...

DK