FAILED [HCT11.2]: PCI Compliance - The Secondary Bus Reset bit in

[Guest]

I am receiving the following PCI Compliance error:

174.178 : +TEST+SEV2 : FAIL: 4.63.18 - The Secondary Bus Reset bit in
the Bridge Control Register must be read/write.
174.178 : Failed or received warnings for Bridge Control Register Tests

The chipset is the Intel 865G. Intel has a couple of documents that say this
error is acceptible. "Contingency Title: All Intel ICH Chipsets – Contingency
610"

I just want to make sure this is a valid exception fot the 865G.

Thanks,

Ron