johannes said:
But doesn't quite explain the higher number of pins.
It does, but you need to either trust the explantion given
or seek out more specialized knowledge.
Consider: a modern CPU drawing 60-100W power at 1.5-2V needs
to move 40-70 Amperes in from power and out to ground with
very little budget for resistance.
In the relatively tolerant electrical power world, this is
moved by cm2 of contact area and #6 or #8 wire.
In CPUs it has to be pushed through teeny-tiny pins (gold plated
out of necessity) that don't look like they could even handle
the 200 mA put through each. On carrier it just gets worse.
5-10 micron wires moving those mA to chip pads. On-chip it gets
even worse, as fractional micron metalic layers have to move mA.
The further they go and higher the load, the worse the voltage
loss and signalling margin.
Pins cost serious money. CPU mfrs don't add them for fun,
but out of necessity and compromise. I've sometimes wondered
whether CPUs should have some alternate power/ground connection
other than std signalling pins. Maybe long bars around the
outside of the carrier bonded to pwr/gnd layers.
-- Robert