On 18 Feb 2004 09:06:10 -0800,
(E-Mail Removed) (G) wrote:
>"rms" <(E-Mail Removed)> wrote in message news:<xWyYb.12145$(E-Mail Removed)>...
>> The drama continues!
>>
>> rms
>
>
>Not that I really care about Rambus' stock one way or another, but I
>have a serious on-topic question: Does anyone who is actually
>knowledgable about such things think that Intel's recent memory
>proposal is subject to any of Rambus' IP claims? How does it
>compare/contrast with XDR? DDR3?
>
>http://www.eet.com/semi/news/OEG20040217S0007
>
>I haven't seen them discussed together from a technical perspective
>anywhere.
How can this be anything other than an invitation to another pointless
discussion of Rambus' far-reaching and highly-questionable patent
claims?
How could the article have been more clear:
"In addition, as the paper's title states, the interconnect scheme is
point-to-point. Interconnect lines daisy chain from one DRAM chip to
another, with carefully controlled clock synchronization to prevent
skew from accumulating."
"This stands in stark contrast to current approaches, which use a
multidrop bus shared by all the DRAMs in an interconnect segment. The
multidrop architecture is used by both DDR and Rambus technologies."
<snip>
"Perhaps more important, Intel has teamed with two DRAM vendors,
Infineon and Samsung, to demonstrate that the interface circuits can
be built in existing DRAM processes with no special provisions, and
can operate in existing DDR2 packages."
Will Rambus claim that its patents are being infringed? Does anybody
really have to ask?
Would Infineon involve itself in another potential Rambus debacle if
it thought Rambus had any chance of prevailing?
RM
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