On Tue, 24 Feb 2004 20:14:24 GMT, "Yousuf Khan"
<(E-Mail Removed)> wrote:
>"Ed" <(E-Mail Removed)> wrote in message
>news:(E-Mail Removed)...
>> *Power Reductions
>> *Speed Improvements
>> *Lower power in Halt, Stopclock states
>> *SSE3 (Prescott New Instructions)
>> *Enhanced data prefetch
>> - Negative..., improved...crossing
>> *On-Die Thermal Throttling
>> *Additional write combining buffers
>> *Convert LEA > ADD
>> *DRAM controller improvements
>> - DDR4000, managing open pages, 2T
>
>So my tolerance for lectures ended after my university days. So what the
>lecturer was saying is that Opterons will be getting SSE3 instructions
>pretty soon?
He mentioned that SSE3 would be implemented in a future stepping. No
dates were given, but I got the sense that he was talking about the
near future. Possibly the next spin that should start appear any day
now, or if not than likely with the first 90nm parts coming late
summer/fall.
-------------
Tony Hill
hilla <underscore> 20 <at> yahoo <dot> ca
Similar Threads
