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Intel and Hypertransport?

 
 
nobody@nowhere.net
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Posts: n/a
 
      31st Oct 2005
Even though The Inquirer' articles should be taken with a grain of
salt, they might be up to something here:
http://www.theinquirer.net/?article=27317
See also http://www.theinquirer.net/?article=1685
In fact, after so many flops, especially on Xeon front, the best way
out for Intel may be to swallow it, and license socket940 from AMD (or
maybe their cross-licensing agreement already gives Intel the rights
to use it). Also good for consumers - that would create first shared
platform since the days of socket7.

NNN
 
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YKhan
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Posts: n/a
 
      31st Oct 2005
Quote:
In fact, after so many flops, especially on Xeon front, the best way
out for Intel may be to swallow it, and license socket940 from AMD (or
maybe their cross-licensing agreement already gives Intel the rights
to use it). Also good for consumers - that would create first shared
platform since the days of socket7.
Actually, Intel and AMD's cross-licensing specifically excludes data
bus technologies. That's why AMD had to stop making Intel
pin-compatible processors after the K6. Now it's time for AMD to make
Intel beg for access.

But anyways, Intel's problems simply go way beyond what bus technology
that they are using. If Intel were to license Socket 940 from AMD, that
would mean not only would it have to build in Hypertransport
(relatively simple), but also a memory controller. Intel simply doesn't
seem to know how to integrate a memory controller into their CPUs,
despite all of their years of integrating one into their chipsets. You
could point out that they should know how to integrate memory
controllers into processors from their Timna experience, but let's face
it Timna was a cancelled processor, there must've been a reason for it
to be cancelled. And even with the Hypertransport, they won't have
access to the coherent HT that is the real secret behind building
multi-socket server chips.

 
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George Macdonald
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Posts: n/a
 
      31st Oct 2005
On 31 Oct 2005 09:02:59 -0800, "YKhan" <(E-Mail Removed)> wrote:

>
Quote:
>In fact, after so many flops, especially on Xeon front, the best way
>out for Intel may be to swallow it, and license socket940 from AMD (or
>maybe their cross-licensing agreement already gives Intel the rights
>to use it). Also good for consumers - that would create first shared
>platform since the days of socket7.
>
>
>Actually, Intel and AMD's cross-licensing specifically excludes data
>bus technologies. That's why AMD had to stop making Intel
>pin-compatible processors after the K6. Now it's time for AMD to make
>Intel beg for access.


Remember that since then, there was the cross-license agreement of May 2001
http://contracts.corporate.findlaw.c...001.01.01.html
- it's impossible to figure exactly what was included in that agreement due
to deleted confidential clauses in the public version but it's safe to
assume it did cover Intel's use of 64-bit extensions and AMDs use of SSEx.
Hypertransport is also an open standard and it would appear anybody can
join for a few $$. That said, even if Intel were to adopt HT, which I
seriously doubt, it'd be highly unlikely that they'd adopt the exact same
socket and pin-out.

--
Rgds, George Macdonald
 
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nobody@nowhere.net
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Posts: n/a
 
      31st Oct 2005
On 31 Oct 2005 09:02:59 -0800, "YKhan" <(E-Mail Removed)> wrote:

>
Quote:
>In fact, after so many flops, especially on Xeon front, the best way
>out for Intel may be to swallow it, and license socket940 from AMD (or
>maybe their cross-licensing agreement already gives Intel the rights
>to use it). Also good for consumers - that would create first shared
>platform since the days of socket7.
>
>
>Actually, Intel and AMD's cross-licensing specifically excludes data
>bus technologies. That's why AMD had to stop making Intel
>pin-compatible processors after the K6. Now it's time for AMD to make
>Intel beg for access.
>
>But anyways, Intel's problems simply go way beyond what bus technology
>that they are using. If Intel were to license Socket 940 from AMD, that
>would mean not only would it have to build in Hypertransport
>(relatively simple), but also a memory controller. Intel simply doesn't
>seem to know how to integrate a memory controller into their CPUs,
>despite all of their years of integrating one into their chipsets. You
>could point out that they should know how to integrate memory
>controllers into processors from their Timna experience, but let's face
>it Timna was a cancelled processor, there must've been a reason for it
>to be cancelled. And even with the Hypertransport, they won't have
>access to the coherent HT that is the real secret behind building
>multi-socket server chips.


AFAIR, Timna died because of Rambus being unpopular and too expensive
for low-end "value" systems it was intended for, and inability of
Intel to get the stop-gap MTH (or whatever else they called that
Rambus-to-SDRAM chip) right. Timna was Rambus-only since its
conception because back then Intel was arrogantly thinking that the
market would swallow anything Intel was pushing on it, including
Rambus. There was nothing wrong with Timna as such, except that it
didn't fit into the market niche it was intended for.

As for access to the coherent HT, AMD may sell it for the right price.
The common platform might make easier access for AMD to the markets
now closed to them (think Dell). OTOH that may be the reason Intel
will not go for it.

NNN
 
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Del Cecchi
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Posts: n/a
 
      1st Nov 2005

"(E-Mail Removed)" <(E-Mail Removed)> wrote in message
news:(E-Mail Removed)...
> On 31 Oct 2005 09:02:59 -0800, "YKhan" <(E-Mail Removed)> wrote:
>
>>
Quote:
>>In fact, after so many flops, especially on Xeon front, the best way
>>out for Intel may be to swallow it, and license socket940 from AMD (or
>>maybe their cross-licensing agreement already gives Intel the rights
>>to use it). Also good for consumers - that would create first shared
>>platform since the days of socket7.
>>
>>
>>Actually, Intel and AMD's cross-licensing specifically excludes data
>>bus technologies. That's why AMD had to stop making Intel
>>pin-compatible processors after the K6. Now it's time for AMD to make
>>Intel beg for access.
>>
>>But anyways, Intel's problems simply go way beyond what bus technology
>>that they are using. If Intel were to license Socket 940 from AMD, that
>>would mean not only would it have to build in Hypertransport
>>(relatively simple), but also a memory controller. Intel simply doesn't
>>seem to know how to integrate a memory controller into their CPUs,
>>despite all of their years of integrating one into their chipsets. You
>>could point out that they should know how to integrate memory
>>controllers into processors from their Timna experience, but let's face
>>it Timna was a cancelled processor, there must've been a reason for it
>>to be cancelled. And even with the Hypertransport, they won't have
>>access to the coherent HT that is the real secret behind building
>>multi-socket server chips.

>
> AFAIR, Timna died because of Rambus being unpopular and too expensive
> for low-end "value" systems it was intended for, and inability of
> Intel to get the stop-gap MTH (or whatever else they called that
> Rambus-to-SDRAM chip) right. Timna was Rambus-only since its
> conception because back then Intel was arrogantly thinking that the
> market would swallow anything Intel was pushing on it, including
> Rambus. There was nothing wrong with Timna as such, except that it
> didn't fit into the market niche it was intended for.
>
> As for access to the coherent HT, AMD may sell it for the right price.
> The common platform might make easier access for AMD to the markets
> now closed to them (think Dell). OTOH that may be the reason Intel
> will not go for it.
>
> NNN


Intel wouldn't have to license HT unless they wanted interoperability
with chipsets for some reason. They could do their own coherent source
synchronous point to point link. It's a little tricky but not that hard.

del


 
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keith
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Posts: n/a
 
      2nd Nov 2005
On Tue, 01 Nov 2005 20:59:25 -0600, EdG wrote:

> On Mon, 31 Oct 2005 21:45:40 -0600, "Del Cecchi"
> <(E-Mail Removed)> wrote:
>
>>
>>"(E-Mail Removed)" <(E-Mail Removed)> wrote in message
>>news:(E-Mail Removed)...
>>> On 31 Oct 2005 09:02:59 -0800, "YKhan" <(E-Mail Removed)> wrote:
>>>
>>>>
Quote:
>>>>In fact, after so many flops, especially on Xeon front, the best way
>>>>out for Intel may be to swallow it, and license socket940 from AMD (or
>>>>maybe their cross-licensing agreement already gives Intel the rights
>>>>to use it). Also good for consumers - that would create first shared
>>>>platform since the days of socket7.
>>>>
>>>>
>>>>Actually, Intel and AMD's cross-licensing specifically excludes data
>>>>bus technologies. That's why AMD had to stop making Intel
>>>>pin-compatible processors after the K6. Now it's time for AMD to make
>>>>Intel beg for access.
>>>>
>>>>But anyways, Intel's problems simply go way beyond what bus technology
>>>>that they are using. If Intel were to license Socket 940 from AMD, that
>>>>would mean not only would it have to build in Hypertransport
>>>>(relatively simple), but also a memory controller. Intel simply doesn't
>>>>seem to know how to integrate a memory controller into their CPUs,
>>>>despite all of their years of integrating one into their chipsets. You
>>>>could point out that they should know how to integrate memory
>>>>controllers into processors from their Timna experience, but let's face
>>>>it Timna was a cancelled processor, there must've been a reason for it
>>>>to be cancelled. And even with the Hypertransport, they won't have
>>>>access to the coherent HT that is the real secret behind building
>>>>multi-socket server chips.
>>>
>>> AFAIR, Timna died because of Rambus being unpopular and too expensive
>>> for low-end "value" systems it was intended for, and inability of
>>> Intel to get the stop-gap MTH (or whatever else they called that
>>> Rambus-to-SDRAM chip) right. Timna was Rambus-only since its
>>> conception because back then Intel was arrogantly thinking that the
>>> market would swallow anything Intel was pushing on it, including
>>> Rambus. There was nothing wrong with Timna as such, except that it
>>> didn't fit into the market niche it was intended for.
>>>
>>> As for access to the coherent HT, AMD may sell it for the right price.
>>> The common platform might make easier access for AMD to the markets
>>> now closed to them (think Dell). OTOH that may be the reason Intel
>>> will not go for it.
>>>
>>> NNN

>>
>>Intel wouldn't have to license HT unless they wanted interoperability
>>with chipsets for some reason. They could do their own coherent source
>>synchronous point to point link. It's a little tricky but not that hard.
>>
>>del
>>

>
> When Opteron was released Intel said, the on-die memory controller and
> HT bus is a short lived stop-gap for AMD, it won't get them far, every
> chip will need diff ram and boards, bla bla bla, then went on to say
> something about how they'll have a better solution that will expand for
> at least 10 years.


What gets me is that any engineer worth salt sees this as *obvious*. WTF
is INtel thinking (actually we know; Itanic).

> Hmmmm must of just been Intel trying to calm their investors down. ;p Ed


....and trying to sell a $10B pig.

--
Keith
 
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EdG
Guest
Posts: n/a
 
      2nd Nov 2005
On Mon, 31 Oct 2005 21:45:40 -0600, "Del Cecchi"
<(E-Mail Removed)> wrote:

>
>"(E-Mail Removed)" <(E-Mail Removed)> wrote in message
>news:(E-Mail Removed)...
>> On 31 Oct 2005 09:02:59 -0800, "YKhan" <(E-Mail Removed)> wrote:
>>
>>>
Quote:
>>>In fact, after so many flops, especially on Xeon front, the best way
>>>out for Intel may be to swallow it, and license socket940 from AMD (or
>>>maybe their cross-licensing agreement already gives Intel the rights
>>>to use it). Also good for consumers - that would create first shared
>>>platform since the days of socket7.
>>>
>>>
>>>Actually, Intel and AMD's cross-licensing specifically excludes data
>>>bus technologies. That's why AMD had to stop making Intel
>>>pin-compatible processors after the K6. Now it's time for AMD to make
>>>Intel beg for access.
>>>
>>>But anyways, Intel's problems simply go way beyond what bus technology
>>>that they are using. If Intel were to license Socket 940 from AMD, that
>>>would mean not only would it have to build in Hypertransport
>>>(relatively simple), but also a memory controller. Intel simply doesn't
>>>seem to know how to integrate a memory controller into their CPUs,
>>>despite all of their years of integrating one into their chipsets. You
>>>could point out that they should know how to integrate memory
>>>controllers into processors from their Timna experience, but let's face
>>>it Timna was a cancelled processor, there must've been a reason for it
>>>to be cancelled. And even with the Hypertransport, they won't have
>>>access to the coherent HT that is the real secret behind building
>>>multi-socket server chips.

>>
>> AFAIR, Timna died because of Rambus being unpopular and too expensive
>> for low-end "value" systems it was intended for, and inability of
>> Intel to get the stop-gap MTH (or whatever else they called that
>> Rambus-to-SDRAM chip) right. Timna was Rambus-only since its
>> conception because back then Intel was arrogantly thinking that the
>> market would swallow anything Intel was pushing on it, including
>> Rambus. There was nothing wrong with Timna as such, except that it
>> didn't fit into the market niche it was intended for.
>>
>> As for access to the coherent HT, AMD may sell it for the right price.
>> The common platform might make easier access for AMD to the markets
>> now closed to them (think Dell). OTOH that may be the reason Intel
>> will not go for it.
>>
>> NNN

>
>Intel wouldn't have to license HT unless they wanted interoperability
>with chipsets for some reason. They could do their own coherent source
>synchronous point to point link. It's a little tricky but not that hard.
>
>del
>


When Opteron was released Intel said, the on-die memory controller and
HT bus is a short lived stop-gap for AMD, it won't get them far, every
chip will need diff ram and boards, bla bla bla, then went on to say
something about how they'll have a better solution that will expand for
at least 10 years.

Hmmmm must of just been Intel trying to calm their investors down. ;p
Ed

 
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Tony Hill
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Posts: n/a
 
      2nd Nov 2005
On Mon, 31 Oct 2005 21:45:40 -0600, "Del Cecchi"
<(E-Mail Removed)> wrote:
>"(E-Mail Removed)" <(E-Mail Removed)> wrote in message
>> As for access to the coherent HT, AMD may sell it for the right price.
>> The common platform might make easier access for AMD to the markets
>> now closed to them (think Dell). OTOH that may be the reason Intel
>> will not go for it.

>
>Intel wouldn't have to license HT unless they wanted interoperability
>with chipsets for some reason. They could do their own coherent source
>synchronous point to point link. It's a little tricky but not that hard.


Yup, and they would probably call it "Common Serial Interconnect" and
use it for both their "Tigerton" Xeon processors and their "Tukwila"
Itanium processors, to be released in 2007 and 2008 respectively.

I'm not really sure what the guys at The Inquirer were smoking when
they wrote their article, because they seem to have totally mixed up
what chip was supposed to use which bus. The chip that Intel
canceled, "Whitefield" was NOT going to use CSI, instead using a more
legacy-style shared bus. It's successor, codenamed "Tigerton" was
supposed to be the same core as "Whitefield" but using an integrated
memory controller and CSI to connect to the rest of the world.

Regardless of what codenames are used, the basic point is quite
simple, Intel has full plans on developing their own
hypertransport-like serial interconnect for future processors.

-------------
Tony Hill
hilla <underscore> 20 <at> yahoo <dot> ca
 
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EdG
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      2nd Nov 2005
On Tue, 01 Nov 2005 23:45:27 -0500, Tony Hill <(E-Mail Removed)>
wrote:

>Regardless of what codenames are used, the basic point is quite
>simple, Intel has full plans on developing their own
>hypertransport-like serial interconnect for future processors.
>
>-------------
>Tony Hill
>hilla <underscore> 20 <at> yahoo <dot> ca


It'll sure be interesting to see what Intel comes out with, but it'll
have to be better then what AMD has now, rumors going around say AMD's
M2 socket will run @ 333MHz instead of todays 200MHz, HT bandwidth is
increased, the on-die memory controller supports DDR2 and DDR3 ram,
plus other tweaks to bring down latency even more.

Can't wait for the fun to start!
Ed

 
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Del Cecchi
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Posts: n/a
 
      3rd Nov 2005

"keith" <(E-Mail Removed)> wrote in message
news(E-Mail Removed)...
> On Tue, 01 Nov 2005 20:59:25 -0600, EdG wrote:
>
>> On Mon, 31 Oct 2005 21:45:40 -0600, "Del Cecchi"
>> <(E-Mail Removed)> wrote:
>>
>>>
>>>"(E-Mail Removed)" <(E-Mail Removed)> wrote in message
>>>news:(E-Mail Removed)...
>>>> On 31 Oct 2005 09:02:59 -0800, "YKhan" <(E-Mail Removed)> wrote:
>>>>
>>>>>
Quote:
>>>>>In fact, after so many flops, especially on Xeon front, the best way
>>>>>out for Intel may be to swallow it, and license socket940 from AMD
>>>>>(or
>>>>>maybe their cross-licensing agreement already gives Intel the rights
>>>>>to use it). Also good for consumers - that would create first
>>>>>shared
>>>>>platform since the days of socket7.
>>>>>
>>>>>
>>>>>Actually, Intel and AMD's cross-licensing specifically excludes data
>>>>>bus technologies. That's why AMD had to stop making Intel
>>>>>pin-compatible processors after the K6. Now it's time for AMD to
>>>>>make
>>>>>Intel beg for access.
>>>>>
>>>>>But anyways, Intel's problems simply go way beyond what bus
>>>>>technology
>>>>>that they are using. If Intel were to license Socket 940 from AMD,
>>>>>that
>>>>>would mean not only would it have to build in Hypertransport
>>>>>(relatively simple), but also a memory controller. Intel simply
>>>>>doesn't
>>>>>seem to know how to integrate a memory controller into their CPUs,
>>>>>despite all of their years of integrating one into their chipsets.
>>>>>You
>>>>>could point out that they should know how to integrate memory
>>>>>controllers into processors from their Timna experience, but let's
>>>>>face
>>>>>it Timna was a cancelled processor, there must've been a reason for
>>>>>it
>>>>>to be cancelled. And even with the Hypertransport, they won't have
>>>>>access to the coherent HT that is the real secret behind building
>>>>>multi-socket server chips.
>>>>
>>>> AFAIR, Timna died because of Rambus being unpopular and too
>>>> expensive
>>>> for low-end "value" systems it was intended for, and inability of
>>>> Intel to get the stop-gap MTH (or whatever else they called that
>>>> Rambus-to-SDRAM chip) right. Timna was Rambus-only since its
>>>> conception because back then Intel was arrogantly thinking that the
>>>> market would swallow anything Intel was pushing on it, including
>>>> Rambus. There was nothing wrong with Timna as such, except that it
>>>> didn't fit into the market niche it was intended for.
>>>>
>>>> As for access to the coherent HT, AMD may sell it for the right
>>>> price.
>>>> The common platform might make easier access for AMD to the markets
>>>> now closed to them (think Dell). OTOH that may be the reason Intel
>>>> will not go for it.
>>>>
>>>> NNN
>>>
>>>Intel wouldn't have to license HT unless they wanted interoperability
>>>with chipsets for some reason. They could do their own coherent
>>>source
>>>synchronous point to point link. It's a little tricky but not that
>>>hard.
>>>
>>>del
>>>

>>
>> When Opteron was released Intel said, the on-die memory controller and
>> HT bus is a short lived stop-gap for AMD, it won't get them far, every
>> chip will need diff ram and boards, bla bla bla, then went on to say
>> something about how they'll have a better solution that will expand
>> for
>> at least 10 years.

>
> What gets me is that any engineer worth salt sees this as *obvious*.
> WTF
> is INtel thinking (actually we know; Itanic).
>
>> Hmmmm must of just been Intel trying to calm their investors down. ;p
>> Ed

>
> ...and trying to sell a $10B pig.
>
> --
> Keith


What is obvious to any engineer on a low salt diet.? You lost me on that
one.

The bus structure on Itanic means little with respect to market
acceptance, it seems to me.

del


 
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