On Sat, 02 Apr 2005 22:40:53 -0500, Boris Gjenero
<(E-Mail Removed)> wrote:
>I have two PC3200/DDR400 DIMMs which according to the SPD should work
>at CL2.5-3-3-8 at 200 MHz and CL2-3-3-7 at 166 MHz. The DIMMs have
>Samsung K4H560838D-TCC4 chips. I found the datasheets at:
>http://www.samsung.com/Products/Semi...K4H560838D.htm
>They specify that the chips work at CL3-4-4 at 200 MHz. This means
>the SPD data on the DIMM causes the chips to operate above their rated
>speed. Is this sort of thing normal nowdays?
Answer: I think so.:-) Who makes the DIMMs? What happens is that based on
some sampling frequency, Samsung bins the chips. A smallish DIMM mfr then
tests every single chip and pushes the operating margin to see what they
can get out of them at the limit. They get some which exceed Samsung's
specs so they stick them on a DIMM and, if you're lucky check every DIMM
for integrity in a number of different mbrds with different chipsets/memory
controllers.
In the case above, they got some chips from a batch which Samsung found to
be just slightly outside the TCCC spec so they got binned as TCC4; the DIMM
mfr found them good enough for TCCC, possibly by pushing the voltage to
2.75V instead of Samsung's quoted 2.6V, and pushed the CL to see what they
could get there. Do they work OK?
--
Rgds, George Macdonald