Why is it advised to used XOR operator to clear the register contents?
Why is load reg,0 not preferred.

In article <(E-Mail Removed)>,
(E-Mail Removed) says...
> Why is it advised to used XOR operator to clear the register contents?
> Why is load reg,0 not preferred.

Homework? Look at the two instructions.

--
Keith

Ani wrote:
> Why is it advised to used XOR operator to clear the register contents?
> Why is load reg,0 not preferred.

At one time in the olden days of x86 (circa 8086 and 80286 days, maybe
even into the 386 and 486 days), the XOR instruction executed in less
cycles than the MOV instruction. Both probably execute in 1 cycle these
days, however, the XOR instruction still takes up less space in memory
by a few bytes.

Yousuf Khan

The 8051 has a better way than either method, at least for the Acc register.
The CLR A instruction executes faster than any other method of clearing the
Acc and uses the least amount of code memory possible.

--
Doug
"Ani" <(E-Mail Removed)> wrote in message
news:(E-Mail Removed)...
> Why is it advised to used XOR operator to clear the register contents?
> Why is load reg,0 not preferred.
>

In article <06%bh.6653$(E-Mail Removed)>,
(E-Mail Removed) says...
> The 8051 has a better way than either method, at least for the Acc register.
> The CLR A instruction executes faster than any other method of clearing the
> Acc and uses the least amount of code memory possible.

True, but even that takes 12 processor cycles. At 12MHz that's
1usec. Yes folks, that's 1000 nsec. The 8051 is hardly a
"normal" processor.


--
Keith

There are many variants of the 8051 (instruction set compatible) that don't
require 12 oscillator clocks for a machine cycle. For example, the obsolete
80251. What is a "normal" CPU anyway?

--
Doug
"krw" <(E-Mail Removed)> wrote in message
news:(E-Mail Removed)...
> In article <06%bh.6653$(E-Mail Removed)>,
> (E-Mail Removed) says...
>> The 8051 has a better way than either method, at least for the Acc
>> register.
>> The CLR A instruction executes faster than any other method of clearing
>> the
>> Acc and uses the least amount of code memory possible.
>
> True, but even that takes 12 processor cycles. At 12MHz that's
> 1usec. Yes folks, that's 1000 nsec. The 8051 is hardly a
> "normal" processor.
>
>
> --
> Keith

In article <KE3ch.1273$(E-Mail Removed)>,
(E-Mail Removed) says...
> There are many variants of the 8051

That's not what you said.

> (instruction set compatible) that don't
> require 12 oscillator clocks for a machine cycle.

Every one is pigdos slow. THe 8051 was never designed for speed.

> For example, the obsolete
> 80251. What is a "normal" CPU anyway?

Von Neuman architecture is one of the measures of "normal". By
*ANY* measure the 8051 ain't normal. It ain't even normal for a
Harvard architecture processor. The instruction set is a mess.
It's *SLOW*. There are some interesting peripherals built into the
variants, but it is no way "normal" I've used it many times, and
it's an interesting product, but the ISA is a mess.

--
Keith

krw wrote:
>> For example, the obsolete
>> 80251. What is a "normal" CPU anyway?
>
> Von Neuman architecture is one of the measures of "normal". By
> *ANY* measure the 8051 ain't normal. It ain't even normal for a
> Harvard architecture processor. The instruction set is a mess.
> It's *SLOW*. There are some interesting peripherals built into the
> variants, but it is no way "normal" I've used it many times, and
> it's an interesting product, but the ISA is a mess.


Wasn't the 8051 the PIC (programmable interrupt controller) inside the PC?

Yousuf Khan

On Sat, 02 Dec 2006 18:05:51 -0500, Yousuf Khan <(E-Mail Removed)> wrote:

>krw wrote:
>>> For example, the obsolete
>>> 80251. What is a "normal" CPU anyway?
>>
>> Von Neuman architecture is one of the measures of "normal". By
>> *ANY* measure the 8051 ain't normal. It ain't even normal for a
>> Harvard architecture processor. The instruction set is a mess.
>> It's *SLOW*. There are some interesting peripherals built into the
>> variants, but it is no way "normal" I've used it many times, and
>> it's an interesting product, but the ISA is a mess.
>
>
>Wasn't the 8051 the PIC (programmable interrupt controller) inside the PC?

No. That'd be the venerable 8251...

/daytripper

"Ani" <(E-Mail Removed)> writes:

> Why is it advised to used XOR operator to clear the register contents?
> Why is load reg,0 not preferred.

Think. You could have come up with the answer to your homework
yourself in less time than it took to post it.
--
Joseph J. Pfeiffer, Jr., Ph.D. Phone -- (505) 646-1605
Department of Computer Science FAX -- (505) 646-1002
New Mexico State University http://www.cs.nmsu.edu/~pfeiffer