Robert Myers wrote:

> Oracle software isn't going to run on IBM boxes. AMD and Opteron
> aren't going to help Oracle compete with IBM. You can add this up
> horizontally, vertically, or diagonally. It doesn't spell AMD. I
> would hesitate to call this a conspiracy, but it is clear that some
> vendors are more, er, comfortable working with some partners than with
> others.

Okay, your technical credibility just dropped below the Register. Hell,
below the National Enquirer. Orqacle does most nicely run on IBM, AIX
and Linux, and I believe S390 but can't check today.

As for ports to 64bit, any software which has been ported to Alpha,
Power, and S390 machines is not likely to have issues porting to
anything else. Good code needs no porting, code with assumptions of 32
bittedness, or signed vs. unsigned characters will have issues, but once
you do the first 64 bit port the other are unlikely to be an issue.

--
bill davidsen <(E-Mail Removed)>
CTO TMR Associates, Inc
Doing interesting things with small computers since 1979

Bill Davidsen wrote:

> Okay, your technical credibility just dropped below the Register. Hell,
> below the National Enquirer. Orqacle does most nicely run on IBM, AIX
> and Linux, and I believe S390 but can't check today.

My humble apologies for this post, it was supposed to be a note only to
the author, and I left it in a postponed queue because I wanted to check
the facts before sending it. Unfortunately, with a browser I use only
occasionally, I managed to send this and several other things in
postponed when an option didn't do what I expected.

The technical point I believe to be true, but Robert caught that himself
later. The personal comment was undeserved, and a reflection of my mood
at the time I wrote it, rather than an opinion I wanted to share with
the world. I thought I had canceled that article before it left the
internal server, but as it escaped I am sorry for the tone of the post
and wanted to say so immediately.

--
bill davidsen <(E-Mail Removed)>
CTO TMR Associates, Inc
Doing interesting things with small computers since 1979

On Fri, 27 Feb 2004 15:40:36 -0500, Bill Davidsen <(E-Mail Removed)>
wrote:

<snip>

>
>The technical point I believe to be true, but Robert caught that himself
>later. The personal comment was undeserved, and a reflection of my mood
>at the time I wrote it, rather than an opinion I wanted to share with
>the world. I thought I had canceled that article before it left the
>internal server, but as it escaped I am sorry for the tone of the post
>and wanted to say so immediately.

That's okay. It was a pretty silly thing to say, even without
checking the web. Gears grinding together in brain. There is no
interpretation of the world in which the comment made any sense at
all, either the way I wrote it or the way I intended it.

RM

On Fri, 27 Feb 2004 10:29:10 +0100, Grumble <(E-Mail Removed)>
wrote:

>Robert Myers wrote:
>
>> Steve Harris wrote:
>>
>>> I think Banias will kill off the current P4 processors and it
>>> will not be long before the Banias will have AMD64 built in.
>>
>> Wow! Don't waste your time talking to me. Go buy some AMD stock.
>
>Why do you say that?
>
>Why would AMD's stock rise if the Pentium M microarchitecture replaced
>the NetBurst microarchitecture? Why would AMD's stock rise if Intel
>implemented AMD64 in the Pentium M processor family?
>
Well, you did drop my ;-).

Leaving aside a multitude of imponderables: Intel looking like it had
made a mistake going with NetBurst in the first place, eroding
prospects for Itanium even further, and leaving a ton of code
optimized for NetBurst high and dry, the thing I can't imagine Intel
doing is ratifying the future of x86 that way.

From a technical point of view, a multicore Banias-style processor has
alot to say for itself even as a server chip, and I'd be surprised if
the possibility hadn't been at least discussed inside Intel. If Intel
has to go there, though, it has either the appearance, the reality, or
both of Intel being forced to change its plans. Not beyond the
capacities of the spinmeisters at Intel, but still good news for AMD
stock.

RM

On Fri, 27 Feb 2004 16:27:35 -0500, Robert Myers <(E-Mail Removed)>
wrote:
>From a technical point of view, a multicore Banias-style processor has
>alot to say for itself even as a server chip, and I'd be surprised if
>the possibility hadn't been at least discussed inside Intel. If Intel

Interesting you should mention that, I just saw a new unofficial Intel
roadmap over at some Japanese site:

http://pc.watch.impress.co.jp/docs/2.../kaigai01l.gif

Well looky here.. 2H of 2005, a little chip called Jonahs, a dual-core
Pentium-M processor. Apparently the chip is designed with two
complete processors (including L2 cache) on a single die, with one
processor turning itself off when the thing is running off a battery.

What is perhaps most interesting is that this chip is the first
dual-core x86 chip that Intel has scheduled. Coming out at about the
same time as the first dual-core Itanium and 3 to 6+ months before the
first dual-core Xeon (assuming that this roadmap is accurate of
course, roadmaps has a nasty habit of changing often).

-------------
Tony Hill
hilla <underscore> 20 <at> yahoo <dot> ca

On Sat, 28 Feb 2004 08:48:38 GMT, Tony Hill <(E-Mail Removed)>
wrote:

>On Fri, 27 Feb 2004 16:27:35 -0500, Robert Myers <(E-Mail Removed)>
>wrote:
>>From a technical point of view, a multicore Banias-style processor has
>>alot to say for itself even as a server chip, and I'd be surprised if
>>the possibility hadn't been at least discussed inside Intel. If Intel
>
>Interesting you should mention that, I just saw a new unofficial Intel
>roadmap over at some Japanese site:
>
>http://pc.watch.impress.co.jp/docs/2.../kaigai01l.gif
>
>Well looky here.. 2H of 2005, a little chip called Jonahs, a dual-core
>Pentium-M processor.

Thanks. Amazing what this idle chit-chat turns up.

>Apparently the chip is designed with two
>complete processors (including L2 cache) on a single die, with one
>processor turning itself off when the thing is running off a battery.
>

Or when the demands on the server are light. That would be a nice
touch.

>What is perhaps most interesting is that this chip is the first
>dual-core x86 chip that Intel has scheduled. Coming out at about the
>same time as the first dual-core Itanium and 3 to 6+ months before the
>first dual-core Xeon (assuming that this roadmap is accurate of
>course, roadmaps has a nasty habit of changing often).
>

Notice that it's slotted as a "mobile" processor <giggle>. I wonder
if HP has the corresponding blade pencilled into its lineup yet?

Since the processors don't share L2 cache, it will be interesting to
see if any facilities other than the FSB are available for
processor-to-processor communication. Probably not, which is a shame.

RM

On Sat, 28 Feb 2004 11:32:35 -0500, Robert Myers <(E-Mail Removed)>
wrote:
>On Sat, 28 Feb 2004 08:48:38 GMT, Tony Hill <(E-Mail Removed)>
>wrote:
>>Interesting you should mention that, I just saw a new unofficial Intel
>>roadmap over at some Japanese site:
>>
>>http://pc.watch.impress.co.jp/docs/2.../kaigai01l.gif
>>
>>Well looky here.. 2H of 2005, a little chip called Jonahs, a dual-core
>>Pentium-M processor.
>
>Thanks. Amazing what this idle chit-chat turns up.

Yup, sometimes Usenet really is good for something other than
flamewars! :>

>>Apparently the chip is designed with two
>>complete processors (including L2 cache) on a single die, with one
>>processor turning itself off when the thing is running off a battery.
>
>Or when the demands on the server are light. That would be a nice
>touch.

Definitely! I don't know if turning cores on/off is dynamic though or
if it requires the thing to be powered down first. Details on the
chip are REAL slim right now, only a few rumors based off a couple
pictures on some Japanese site.

>>What is perhaps most interesting is that this chip is the first
>>dual-core x86 chip that Intel has scheduled. Coming out at about the
>>same time as the first dual-core Itanium and 3 to 6+ months before the
>>first dual-core Xeon (assuming that this roadmap is accurate of
>>course, roadmaps has a nasty habit of changing often).
>
>Notice that it's slotted as a "mobile" processor <giggle>. I wonder
>if HP has the corresponding blade pencilled into its lineup yet?

Hehe, I don't know. Knowing Intel they will probably try to force
companies to only use this chip in mobile applications, or possibly
even require that it be purchased as part of a Centrino bundle. WiFi
on a server blade? More useless things have happened before I guess.

>Since the processors don't share L2 cache, it will be interesting to
>see if any facilities other than the FSB are available for
>processor-to-processor communication. Probably not, which is a shame.

Hmm, interesting thought, I hadn't really considered that. I'm sure
that it would be possible to by-pass the main bus and have a cache
coherency short-cut of sorts between the two chips. Of course, that
sort of thing comes down to a money decision, is the performance gain
worth the extra cost? My guess is probably not, at least from Intel's
perspective.

-------------
Tony Hill
hilla <underscore> 20 <at> yahoo <dot> ca