http://www.theregister.co.uk/2004/08...90nm_strained/

Though this story is about the new 90nm process using strained-silicon
techniques, it's also known that the older 130nm process also uses it. This
is kind of interesting because both IBM and Intel were competing against
each other to introduce this stuff, and you didn't hear whether AMD would
introduce it too, but it looks like they did, and very quietly.

Yousuf Khan

--
Humans: contact me at ykhan at rogers dot com
Spambots: just reply to this email address ;-)

Johannes H Andersen wrote:
> Yousuf Khan wrote:
>>
>> http://www.theregister.co.uk/2004/08...90nm_strained/
>>
>> Though this story is about the new 90nm process using
>> strained-silicon techniques, it's also known that the older 130nm
>> process also uses it. This is kind of interesting because both IBM
>> and Intel were competing against each other to introduce this stuff,
>> and you didn't hear whether AMD would introduce it too, but it looks
>> like they did, and very quietly.
>>
>> Yousuf Khan
>
> But Pentium M also uses 90nm process. They don't seem to have the same
> problems as the Prescotts? Something don't add up.

Don't they? I seem to recall that the Dothans were delayed early on too.
It's obvious that Intel is fixing them one product at a time as they go on.

Yousuf Khan

Yousuf Khan wrote:
>
> http://www.theregister.co.uk/2004/08...90nm_strained/
>
> Though this story is about the new 90nm process using strained-silicon
> techniques, it's also known that the older 130nm process also uses it. This
> is kind of interesting because both IBM and Intel were competing against
> each other to introduce this stuff, and you didn't hear whether AMD would
> introduce it too, but it looks like they did, and very quietly.
>
> Yousuf Khan

But Pentium M also uses 90nm process. They don't seem to have the same
problems as the Prescotts? Something don't add up.

Johannes H Andersen wrote:
>
> Yousuf Khan wrote:
>
>>http://www.theregister.co.uk/2004/08...90nm_strained/
>>
>>Though this story is about the new 90nm process using strained-silicon
>>techniques, it's also known that the older 130nm process also uses it. This
>>is kind of interesting because both IBM and Intel were competing against
>>each other to introduce this stuff, and you didn't hear whether AMD would
>>introduce it too, but it looks like they did, and very quietly.
>>
>> Yousuf Khan
>
>
> But Pentium M also uses 90nm process. They don't seem to have the same
> problems as the Prescotts? Something don't add up.

http://zdnet.com.com/2100-1103-5317169.html

<quote>

Although AMD is not divulging many details about its strained silicon,
the company's technology differs from the way IBM and Intel incorporate
it, the AMD representative said.

<snip>

AMD is more localized, Thomas Sonderman, the company's director of
automated precision manufacturing technology, told The Semiconductor
Reporter. The AMD representative would not comment on Sonderman's
remark, but other AMD executives and researchers have described
localized straining as a process in which only certain parts of a chip
are affected. It is unclear whether AMD's technology will provide the
same level of performance improvement.

</quote>

Guess we'll find out in time what that really means.

RM

Robert Myers wrote:
> AMD is more localized, Thomas Sonderman, the company's director of
> automated precision manufacturing technology, told The Semiconductor
> Reporter. The AMD representative would not comment on Sonderman's
> remark, but other AMD executives and researchers have described
> localized straining as a process in which only certain parts of a chip
> are affected. It is unclear whether AMD's technology will provide the
> same level of performance improvement.
>
> </quote>
>
> Guess we'll find out in time what that really means.

There were some previous stories about where AMD said that almost all
silicon is "strained" to a certain extent anyways. I think the distinction
between what is highly strained and what is just normally strained is
subjective.

Yousuf Khan

On Fri, 20 Aug 2004 20:34:23 GMT, Johannes H Andersen
<(E-Mail Removed)> wrote:
>Yousuf Khan wrote:
>>
>> http://www.theregister.co.uk/2004/08...90nm_strained/
>>
>> Though this story is about the new 90nm process using strained-silicon
>> techniques, it's also known that the older 130nm process also uses it. This
>> is kind of interesting because both IBM and Intel were competing against
>> each other to introduce this stuff, and you didn't hear whether AMD would
>> introduce it too, but it looks like they did, and very quietly.
>
>But Pentium M also uses 90nm process. They don't seem to have the same
>problems as the Prescotts? Something don't add up.

Err, the Pentium-M chips produced on a 90nm process (aka 'Dothan')
were 6 months late to ship, I would say that it had a few problems of
it's own.

If your referring more to the power consumption side of things, then
no the Dothan didn't have big issues, but it also has FAR fewer logic
transistors than Prescott. In fact, for a chip with 60M+ logic
transistors, the Prescott's power consumption really isn't
unexpectedly high. The real question that no one at Intel seems to be
able to answer is how they managed to more than double the number of
transistors (vs. Northwood) and not have anything to show for it.

-------------
Tony Hill
hilla <underscore> 20 <at> yahoo <dot> ca

"Tony Hill" <(E-Mail Removed)> wrote in message news:(E-Mail Removed)...
> On Fri, 20 Aug 2004 20:34:23 GMT, Johannes H Andersen
> <(E-Mail Removed)> wrote:

> The real question that no one at Intel seems to be
> able to answer is how they managed to more than double the number of
> transistors (vs. Northwood) and not have anything to show for it.

Whaddaya mean?! Greater heat output, which gives justification for BTX.
(hehe, will they ever be able to live this down?)

AJ

"Yousuf Khan" <(E-Mail Removed)> writes:

> Robert Myers wrote:
>> AMD is more localized, Thomas Sonderman, the company's director of
>> automated precision manufacturing technology, told The Semiconductor
>> Reporter. The AMD representative would not comment on Sonderman's
>> remark, but other AMD executives and researchers have described
>> localized straining as a process in which only certain parts of a chip
>> are affected. It is unclear whether AMD's technology will provide the
>> same level of performance improvement.
>>
>> </quote>
>>
>> Guess we'll find out in time what that really means.
>
> There were some previous stories about where AMD said that almost all
> silicon is "strained" to a certain extent anyways. I think the distinction
> between what is highly strained and what is just normally strained is
> subjective.

[Caveat: it's been more than 10 years since I worked with
semiconductor physics during my thesis work. Time flies]

Just adding the dopants (phosporous, boron, etc) will create a minute
strain in the silicon due to the difference in lattice constant.
IIRC, it is only noticable in the most heavily doped N-regions and
then as a small reduction of mobility. And MOS tranistors usually
deploy lower dopant levels than the emitter regions of bipolar
transistors.

Also, the areas near other materials (oxide, nitride) are normally
strained (compressed, I believe). SiGe is well-known for being
strained because Germanium has a lattice constant approx 4,2% bigger
than Silicon. Too much heat or a too thick SiGe layer will cause the
strained layer to relax, ie develop cracks.

I guess that what AMD is trying to say, without actually saying it, is
that it is only the region right under the gate is strained. Which
points either to some kind of selective deposition technique related
to the gate oxide, or a masking step resulting in leaving the strained
in only the areas directly below the gate oxide.


Kai
--
Kai Harrekilde-Petersen <khp(at)harrekilde(dot)dk>

"Tony Hill" <(E-Mail Removed)> skrev i en meddelelse
news:(E-Mail Removed)...
> On Fri, 20 Aug 2004 20:34:23 GMT, Johannes H Andersen
> <(E-Mail Removed)> wrote:
> >Yousuf Khan wrote:
> >>
> >> http://www.theregister.co.uk/2004/08...90nm_strained/
> >>
> >> Though this story is about the new 90nm process using strained-silicon
> >> techniques, it's also known that the older 130nm process also uses it.
This
> >> is kind of interesting because both IBM and Intel were competing
against
> >> each other to introduce this stuff, and you didn't hear whether AMD
would
> >> introduce it too, but it looks like they did, and very quietly.
> >
> >But Pentium M also uses 90nm process. They don't seem to have the same
> >problems as the Prescotts? Something don't add up.
>
> Err, the Pentium-M chips produced on a 90nm process (aka 'Dothan')
> were 6 months late to ship, I would say that it had a few problems of
> it's own.

The problems were supposedly due to circuit design issues.

In article <41271bfb$0$274$(E-Mail Removed)>,
Sirannon <rune_no***(E-Mail Removed)> wrote:
>
>"Tony Hill" <(E-Mail Removed)> skrev i en meddelelse
>news:(E-Mail Removed)...
>>
>> Err, the Pentium-M chips produced on a 90nm process (aka 'Dothan')
>> were 6 months late to ship, I would say that it had a few problems of
>> it's own.
>
>The problems were supposedly due to circuit design issues.

Moving to new processes has been getting gradually harder, but many
people were taken aback just HOW much harder it was to produce viable
CPUs on the 90 nm process than on the 130 nm one. I should be very
surprised if we see the 65 nm process on what is currently stated to
be its schedule.

This is almost certainly a major part of the cause that Intel has
been juggling its roadmap (e.g. cancelling Tejas), and is definitely
the reason that AMD have got into bed with IBM.


Regards,
Nick Maclaren.