Well, I've found even more details about Pacifica (PT), as well as
Vanderpool (VT). One thing that's different between VT and PT is that
PT supports the virtualization of Real Mode (RM) and Non-Paged
Protected Mode (NPPM), but VT doesn't. Now RM & NPPM are two of the
most elderly machine states on x86 hardware. RM is where good old
MS-DOS used to run, while NPPM is where OS/2 1.x, Xenix, Windows 2.x
(286), and Windows 3.x in "Standard Mode" used to run. Not sure if any
of this extra functionality is actually useful in the real world
anymore, but in any case it's a more complete implementation.
Intel's documentation states that it expects the Hypervisor software to
emulate these modes for it:
Quote:
CR0.PE and CR0.PG restrictions imply that VMX operation is
supported only in paged protected mode (including IA-32e mode).
Therefore, guest software cannot be run in unpaged protected mode or in
real-address mode. If a VMM is to support guest software that expects
to run in unpaged protected mode or in real-address mode, the VMM must
support emulation of these modes. A VMM can use "identity" page
tables to emulate unpaged protected mode and can use virtual-8086 mode
as part of a strategy to emulate real-address mode.
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I haven't gone through the PDF's in enough detail to determine whether
their implementations are just copies of each other with some names
changed but the opcodes remaining the same, or not.
Here's the links to the technical-spec PDF's:
AMD:
http://tinyurl.com/9a8ys
<http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/33047.pdf>
Intel:
http://tinyurl.com/8lbtj
<ftp://download.intel.com/technology/computing/vptech/C97063-002.pdf>